Honeywell Series 60 (Level 6)
Model 43/53
Central Processor Unit
(Volume I)

• Introductory Material (11 pages, 1.4 Mb):
  • Cover
  • Title
  • Contents
  • Logic Symbology
• Section 1: Introduction (27 pages, 3.4 Mb):
  • General Description
  • Reference Documentation
  • Software Visible Registers
  • Data Word Formats
  • Instruction Word Formats
  • CPU/Memory Effective Addressing
  • Memory Address Boundaries
• Section 2: Theory Overview (40 pages, 5.8 Mb):
  • CPU Hardware Overview
  • Megabus Operations
  • Megabus Formats
  • CPU Firmware Overview
• Section 3: Firmware Operation (39 pages, 5.6 Mb):
  • Firmware Word
  • Traps
  • Interrupts
• Section 4: Hardware Operation (66 pages, 10.4 Mb):
  • Master clock
  • Control Store
  • Next Address Generation (NAG) Logic
  • Microprocessor
  • RALU Addressing
  • Internal Bus
  • CPU Registers
  • CPU Control Flip-Flops
  • Miscellaneous CPU Hardware
  • Megabus Network
  • Interrupt Control Logic
  • Full Control Panel