From reboot@ncf.ca Sun Mar 2 11:47:29 2025 From: Mike Kenzie To: cctalk@classiccmp.org Subject: [cctalk] Re: VCF =?utf-8?q?Montr=C3=A9al?= Survey Date: Sat, 01 Mar 2025 17:39:06 +0000 Message-ID: <21148959.36460986.1740850402254.JavaMail.zimbra@ncf.ca> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6934076168028196182==" --===============6934076168028196182== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable I see the survey is now closed. I have a large collection to sell off. Seve= ral buyers have come from Montreal to take the Next Cube, Lisa, Dec Rainbow, = and a bunch of others but I still have a bunch that I do not want to ship. I= am in Ottawa which is only a 2 hour detour. Will there be sale list for th= e event? =20 You can see the original list of machines here: http://web.ncf.ca/ba600 ----- Original Message ----- > From: "General Discussion, On-Topic and Off-Topic Posts" > To: "General Discussion, On-Topic and Off-Topic Posts" > Cc: "Jeffrey Brace" > Sent: Monday, February 24, 2025 6:20:53 PM > Subject: [cctalk] Re: VCF Montr=C3=A9al Survey > And please share this with any groups or people that you think would be > interested. We are having a great response and want to get as much feedback > as possible from everyone! >=20 > On Sun, Feb 23, 2025 at 7:52=E2=80=AFPM Jeffrey Brace = wrote: >=20 >> This survey is in its final days. You are invited to add your anonymous >> input by clicking here https://bit.ly/vcfm2026pre-en >> >> Ce sondage entre dans ses derniers jours. Vous =C3=AAtes invit=C3=A9 =C3= =A0 ajouter vos >> commentaires anonymes en cliquant ici https://bit.ly/vcfm2026pre-fr >> >> DATE: January 25 & 26, 2026. >> >> LOCATION: Montr=C3=A9al, QC, Canada >> Jeff Brace >> VCF National Board Member Chairman & Vice President >> --===============6934076168028196182==-- From knowak@alumni.calpoly.edu Mon Mar 3 07:08:29 2025 From: Kurt Nowak To: cctalk@classiccmp.org Subject: [cctalk] Re: 3d printer recreation question Date: Sun, 02 Mar 2025 11:24:58 -0800 Message-ID: In-Reply-To: <2078888248.1215665.1721248580073@connect.xfinity.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3712696314025110168==" --===============3712696314025110168== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit I have an SS5 and the plastic bracket that holds the SCSI backplane in place, shattered. The thing is so brittle. I tried to epoxy it back together but that failed miserably. I do 3-D modeling with Creo and I'll model it and have a new one printed somewhere. I'll have to pop open my SS20 to see if it's the same bracket. -Kurt On Wed, Jul 17, 2024 at 1:44 PM CAREY SCHUG via cctalk < cctalk(a)classiccmp.org> wrote: > it was kind of a general question, but I have a sparcstation 5 or two that > it would be nice to put a second disk into. Also SGI indigo and Indy that > I think needed caddies...it's been so long. I bought them but never > followed up, not having had any experience in my working life. > > I had a stack of sparcstation 5s with no disk, hence needing caddies, but > I donated them to a local VCF. They were received with the hope of my > running a solaris install class at a local nonprofit when we didn't know > that had no disks. > > 
--Carey
> > > On 07/17/2024 11:42 AM CDT Alan Perry wrote: > > > > > > What Sun 4c/4m things are folks looking for? With Shapeways shutting > down, I had incentive to figure out how to get decent prints out of my 3D > printer and finally did it over the weekend. > > > > I have pre-sun4u Sun and similar vintage systems with good parts to > measure and make models from. I don’t really know what I am doing but I > have made models for car parts and custom furniture fasteners that turned > out well. > > > > alan > > > > > On Jul 16, 2024, at 23:34, CAREY SCHUG via cctalk < > cctalk(a)classiccmp.org> wrote: > > > > > > is anybody 3-d printing things that are often lost, or additional > ones needed, like disk caddies for sun and silicon graphics systems? > > > > > > I presume somebody makes imitation scsi disks that are adapters to SSD > or other modern hardware. > --===============3712696314025110168==-- From jeffrey@vcfed.org Tue Mar 4 02:49:06 2025 From: Jeffrey Brace To: cctalk@classiccmp.org Subject: [cctalk] VCF East 2025 tickets now on sale! Date: Mon, 03 Mar 2025 21:48:43 -0500 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1651819925067772549==" --===============1651819925067772549== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit https://events.humanitix.com/vintage-computer-festival-east-2025 Jeff Brace VCF East Showrunner Vintage Computer Federation is a 501c3 charity --===============1651819925067772549==-- From bear@typewritten.org Tue Mar 4 05:01:15 2025 From: "r.stricklin" To: cctalk@classiccmp.org Subject: [cctalk] networking on CTOS Date: Mon, 03 Mar 2025 20:20:41 -0800 Message-ID: <61BADA6B-7E0A-4914-910D-B03C7A2A1940@typewritten.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1261091450973561678==" --===============1261091450973561678== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Trying to experiment with TCP/IP (and, to a lesser extent, OSI and BNet clust= er) networking on a Convergent/Unisys CTOS system (SuperGen SG3600). Am exper= iencing several anomalous results and would love to have a chat with someone = who has real experience with this=E2=80=A6 if some such person is on the list. Thanks! ok bear. --===============1261091450973561678==-- From dbrock@computerhistory.org Tue Mar 4 13:49:59 2025 From: dbrock@computerhistory.org To: cctalk@classiccmp.org Subject: [cctalk] Vendor for data recovery from TK50 and TK25 tapes? Date: Tue, 04 Mar 2025 13:49:51 +0000 Message-ID: <174109619166.1304.10931254664877545791@classiccmp.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3330175586201076273==" --===============3330175586201076273== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Hello everyone! I'm new to the list, but am posting here on the suggestion of Chuck Guzis. I'= m a curator at the Computer History Museum, and am trying to identify a vendo= r who could potentially work with us to recover data from a set of TK50 and T= K25 tapes that came to us in an archival collection. Any pointers would be mu= ch appreciated. I can be reached directly at dbrock(a)computerhistory.org Thanks in advance for your time, David --===============3330175586201076273==-- From healyzh@avanthar.com Tue Mar 4 14:11:21 2025 From: Zane Healy To: cctalk@classiccmp.org Subject: [cctalk] Re: Vendor for data recovery from TK50 and TK25 tapes? Date: Tue, 04 Mar 2025 06:11:04 -0800 Message-ID: <03607BA1-6F56-4693-B569-DEF70B51F668@avanthar.com> In-Reply-To: <174109619166.1304.10931254664877545791@classiccmp.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6253531055178404179==" --===============6253531055178404179== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Iron Mountain should be able to handle this. Zane > On Mar 4, 2025, at 5:50=E2=80=AFAM, dbrock--- via cctalk wrote: >=20 > =EF=BB=BFHello everyone! > I'm new to the list, but am posting here on the suggestion of Chuck Guzis. = I'm a curator at the Computer History Museum, and am trying to identify a ven= dor who could potentially work with us to recover data from a set of TK50 and= TK25 tapes that came to us in an archival collection. Any pointers would be = much appreciated. I can be reached directly at dbrock(a)computerhistory.org > Thanks in advance for your time, > David --===============6253531055178404179==-- From cz@alembic.crystel.com Tue Mar 4 14:13:37 2025 From: Christopher Zach To: cctalk@classiccmp.org Subject: [cctalk] Re: networking on CTOS Date: Tue, 04 Mar 2025 09:13:21 -0500 Message-ID: <588E1BFD-F3C4-4DB0-9240-782208A1974C@alembic.crystel.com> In-Reply-To: <61BADA6B-7E0A-4914-910D-B03C7A2A1940@typewritten.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1112888911295132932==" --===============1112888911295132932== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Is this the wollogong tcpip stack from the 1980s? I have that running ony 3b1= (att 7300 PC convergent unix) and yes it is both wacky and fragile C On March 3, 2025 11:20:41 PM EST, "r.stricklin via cctalk" wrote: >Trying to experiment with TCP/IP (and, to a lesser extent, OSI and BNet clus= ter) networking on a Convergent/Unisys CTOS system (SuperGen SG3600). Am expe= riencing several anomalous results and would love to have a chat with someone= who has real experience with this=E2=80=A6 if some such person is on the lis= t. > >Thanks! > > >ok >bear. --===============1112888911295132932==-- From cz@alembic.crystel.com Fri Mar 7 02:32:30 2025 From: cz To: cctalk@classiccmp.org Subject: [cctalk] Re: Vendor for data recovery from TK50 and TK25 tapes? Date: Thu, 06 Mar 2025 21:32:16 -0500 Message-ID: In-Reply-To: <174109619166.1304.10931254664877545791@classiccmp.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============4761753988200536588==" --===============4761753988200536588== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Depends on the condition of the tapes and the value of the data. I am=20 probably one of the few still happily using TK50 and TK70 drives for=20 backup and booting some 11/73 and 11/83 systems; they're not BAD per se=20 you just need to understand why they work. What is it? Vax stuff? Pdp11? In terms of how to make them work, the secret is that the two capstans=20 in them have bearings which are now dry and either need to be replaced=20 or re-oiled. The capstans are put on their shafts by screws which are=20 factory tuned, but you can mark the bolts, unscrew them counting the=20 turns, then put each bolt back on the same number of turns to re-align=20 them. Aside from that don't use tapes that look like goo, clean the head=20 when switching to/from known good tapes to new (suspect) ones and live a=20 clean life... C On 3/4/2025 8:49 AM, dbrock--- via cctalk wrote: > Hello everyone! > I'm new to the list, but am posting here on the suggestion of Chuck Guzis. = I'm a curator at the Computer History Museum, and am trying to identify a ven= dor who could potentially work with us to recover data from a set of TK50 and= TK25 tapes that came to us in an archival collection. Any pointers would be = much appreciated. I can be reached directly at dbrock(a)computerhistory.org > Thanks in advance for your time, > David --===============4761753988200536588==-- From holm@freibergnet.de Fri Mar 7 20:42:13 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] IDT 49C402BG84 Pinout? Date: Fri, 07 Mar 2025 21:36:52 +0100 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0912801846822702699==" --===============0912801846822702699== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Hi all, I'm dreaming to build sometimes my own Bit Slice CPU (when I have spare time) and I have collected several IC's in the last years for this purpose. Today a small antistatic bag with 4x IDT49C402BG84 and two IDT 49C410J fell in my hands while I was sorting some stuff. I know what they are and what they could do, they are able to help me to build a Bit Slice CPU w/o very large PCB's connecting hordes of 2901 etc. Besides of that they are CMOS and should draw much less power. But I have a problem with the 49C402: All datasheets that I could find until now, don't have the pinput auf that nice PGA84 package, there are DIP68, LCC/PLCC68 G68 or PG68 and QE68 "Cerquad" pinouts listet in every datasheet, but I have 4 chips in a PGA84 housing... This ebay page has pictures: https://www.ebay.com/p/10020043211 I don't have anything todo with the seller. Can anyone help finding the pinout? The chips itself don't seem to that seldom... Kind Regards, Holm -- Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe, Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============0912801846822702699==-- From wayne.sudol@hotmail.com Fri Mar 7 21:04:48 2025 From: Wayne S To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 07 Mar 2025 21:04:36 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8426462183375026832==" --===============8426462183375026832== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Try here. Might have to create an account. IDT - 49C402BG84 jotrin.com [favicon.ico] Sent from my iPhone On Mar 7, 2025, at 12:42, Holm Tiffe via cctalk wro= te: =EF=BB=BFHi all, I'm dreaming to build sometimes my own Bit Slice CPU (when I have spare time) and I have collected several IC's in the last years for this purpose. Today a small antistatic bag with 4x IDT49C402BG84 and two IDT 49C410J fell in my hands while I was sorting some stuff. I know what they are and what they could do, they are able to help me to build a Bit Slice CPU w/o very large PCB's connecting hordes of 2901 etc. Besides of that they are CMOS and should draw much less power. But I have a problem with the 49C402: All datasheets that I could find until now, don't have the pinput auf that nice PGA84 package, there are DIP68, LCC/PLCC68 G68 or PG68 and QE68 "Cerquad" pinouts listet in every datasheet, but I have 4 chips in a PGA84 housing... This ebay page has pictures: https://www.ebay.com/p/10020043211 I don't have anything todo with the seller. Can anyone help finding the pinout? The chips itself don't seem to that seldom... Kind Regards, Holm -- Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe, Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============8426462183375026832==-- From wrcooke@wrcooke.net Fri Mar 7 21:35:29 2025 From: wrcooke@wrcooke.net To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 07 Mar 2025 16:35:21 -0500 Message-ID: <453293722.283956.1741383321228@email.ionos.com> In-Reply-To: =?utf-8?q?=3CCO1PR08MB7208B868F96363EDBB7405F5E4D52=40CO1PR08MB?= =?utf-8?q?7208=2Enamprd08=2Eprod=2Eoutlook=2Ecom=3E?= MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8903909392334618277==" --===============8903909392334618277== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Digikey has the part listed ($166 each) and their page has a link to the data= sheet that seems to have the pga package: Digikey https://www.digikey.com/en/products/detail/rochester-electronics-llc/49C402GB= /12112112 Direct to Datasheet https://rocelec.widen.net/view/pdf/rbdjetrmoo/IDTIS12976-1.pdf?t.download=3Dt= rue&u=3D5oefqw Will > On 03/07/2025 4:04 PM EST Wayne S via cctalk wrot= e: >=20 > =20 > Try here. > Might have to create an account. > > IDT - 49C402BG84 > jotrin.com > [favicon.ico] >=20 > Sent from my iPhone >=20 > On Mar 7, 2025, at 12:42, Holm Tiffe via cctalk w= rote: >=20 > =EF=BB=BFHi all, >=20 > I'm dreaming to build sometimes my own Bit Slice CPU (when I have spare tim= e) > and I have collected several IC's in the last years for this purpose. >=20 > Today a small antistatic bag with 4x IDT49C402BG84 and two IDT 49C410J > fell in my hands while I was sorting some stuff. >=20 > I know what they are and what they could do, they are able to help me > to build a Bit Slice CPU w/o very large PCB's connecting hordes of 2901 etc. > Besides of that they are CMOS and should draw much less power. > But I have a problem with the 49C402: All datasheets that I could find > until now, don't have the pinput auf that nice PGA84 package, there are > DIP68, LCC/PLCC68 G68 or PG68 and QE68 "Cerquad" pinouts listet in every > datasheet, but I have 4 chips in a PGA84 housing... >=20 > This ebay page has pictures: https://www.ebay.com/p/10020043211 > I don't have anything todo with the seller. >=20 > Can anyone help finding the pinout? > The chips itself don't seem to that seldom... >=20 > Kind Regards, > Holm > -- > Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe, > Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 > info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 You just can't beat the person who never gives up. Babe Ruth --===============8903909392334618277==-- From bfranchuk@jetnet.ab.ca Sat Mar 8 02:41:54 2025 From: ben To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 07 Mar 2025 19:41:44 -0700 Message-ID: <3331e115-2230-4983-a4bf-f22649e0d4d9@jetnet.ab.ca> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2683785671282777142==" --===============2683785671282777142== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On 2025-03-07 1:36 p.m., Holm Tiffe via cctalk wrote: > Hi all, >=20 > I'm dreaming to build sometimes my own Bit Slice CPU (when I have spare tim= e) > and I have collected several IC's in the last years for this purpose. >=20 > Today a small antistatic bag with 4x IDT49C402BG84 and two IDT 49C410J > fell in my hands while I was sorting some stuff. >=20 You really want N3002N 2 bit, bit slices, 9 for 18 BITS, 10 for 20 BITS. > I know what they are and what they could do, they are able to help me > to build a Bit Slice CPU w/o very large PCB's connecting hordes of 2901 etc. > Besides of that they are CMOS and should draw much less power. > But I have a problem with the 49C402: All datasheets that I could find > until now, don't have the pinput auf that nice PGA84 package, there are > DIP68, LCC/PLCC68 G68 or PG68 and QE68 "Cerquad" pinouts listet in every > datasheet, but I have 4 chips in a PGA84 housing... >=20 if you must go to the dark side, 16 or 32 bit design pick up a 16 bit alu in a PLCC 68 package. I have been doing a lot of work with CPLD's ATF1508 and (the chips are easy to program) are easy remove/insert into the sockets. https://store.rosco-m68k.com/products/little-atf-programmer I had some 16 bit slices, but had problems with the 64 pin dip package for a 20 bit cpu. I later tried a regular 2901's. I also needed to use 22v10's all over the place. The biggest problem was design had bus timing issues, it worked for few minutes and then quit. > This ebay page has pictures: https://www.ebay.com/p/10020043211 > I don't have anything todo with the seller. >=20 Poland seems to have alot of odd stuff on ebay like N3002's. Hint, Hint :) While waiting for data, now is good time to think about software. Ben. > Kind Regards, > Holm PS. I have older pcbs mostly working, of a 18 bit cpu ready to go to a good home. PPS. Still writing software, so the hardware is not ready to ship. You=20 do want a working bootstrap program! --===============2683785671282777142==-- From emu@e-bbes.com Sat Mar 8 15:16:52 2025 From: emanuel stiebler To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Sat, 08 Mar 2025 10:09:37 -0500 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8224575655132442885==" --===============8224575655132442885== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On 2025-03-07 15:36, Holm Tiffe via cctalk wrote: > Hi all, >=20 > I'm dreaming to build sometimes my own Bit Slice CPU (when I have spare tim= e) > and I have collected several IC's in the last years for this purpose. There is a pretty quiet bitslice mailing list. Are you on it? --===============8224575655132442885==-- From bfranchuk@jetnet.ab.ca Sat Mar 8 16:21:58 2025 From: ben To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Sat, 08 Mar 2025 09:21:49 -0700 Message-ID: <760e536f-67fa-4246-8298-bb5b3a7c0023@jetnet.ab.ca> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6963261027128471399==" --===============6963261027128471399== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On 2025-03-08 8:09 a.m., emanuel stiebler via cctalk wrote: > On 2025-03-07 15:36, Holm Tiffe via cctalk wrote: >> Hi all, >> >> I'm dreaming to build sometimes my own Bit Slice CPU (when I have >> spare time) >> and I have collected several IC's in the last years for this purpose. > > There is a pretty quiet bitslice mailing list. Are you on it? Well it so quiet, I never heard about it. Where is it? Ben. --===============6963261027128471399==-- From bitwiz@12bitsbest.com Sat Mar 8 19:15:16 2025 From: Mike Katz To: cctalk@classiccmp.org Subject: [cctalk] ROM to Flash Adapter for HP Portable PC ROM Drawer help Date: Sat, 08 Mar 2025 13:15:07 -0600 Message-ID: In-Reply-To: <453293722.283956.1741383321228@email.ionos.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0299275758700656784==" --===============0299275758700656784== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The HP Portable Plus computer ROM Drawer uses 28 pin 1MBit (128K) Mask=20 ROMs (TC531000) or 512KBit EPROMs (27C512). A few years ago a company called Personalized Software made something=20 called a ROMBO.=C2=A0 This was an adapter that allowed the use of a 32 Pin=20 27C010 Quad Pack and plugged into the 28 pin socket on the ROM Drawer.=C2=A0 = The down side of this was that the ROMBO needed a special EPROM=20 programmer to program.=C2=A0 Here is a link to a picture of the ROMBO.=C2=A0 = These=20 are no longer available. https://drive.google.com/file/d/1VKaWpfTIgDriStECXqfptBjHoL6wEmN6/view?usp=3D= sharing I am thinking of doing something like the schematic linked below to use=20 a modern flash chip (AT28C010) in place of the 27010 and bring out the=20 three pins necessary for programming to jumpers that can be connected to=20 a flash programmer (or I might make an adapter board that the board=20 plugs into for programming). https://drive.google.com/file/d/18RsZPBJldTyxzjozVlO9okfpgOK7P2QT/view?usp=3D= sharing Has anyone made anything like this for the portable plus or seen=20 something similar. I also have the following questions: 1.=C2=A0 Is there enough room in the ROM Drawer for some kind of socket on=20 the adapter board? 2.=C2=A0 Where can I find the low profile pins used in the ROMBO? 3.=C2=A0 Have I missed anything? Thank you... --===============0299275758700656784==-- From brain@jbrain.com Sat Mar 8 20:22:12 2025 From: brain@jbrain.com To: cctalk@classiccmp.org Subject: [cctalk] Re: ROM to Flash Adapter for HP Portable PC ROM Drawer help Date: Sat, 08 Mar 2025 14:21:54 -0600 Message-ID: <2069d476-ca36-440d-acb4-212ad2bbcf59@Spark> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3279927018072951044==" --===============3279927018072951044== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable =C2=A0ROM-el should work. -- RETRO Innovations, Contemporary Gear for Classic Systems www.go4retro.com store.go4retro.com On Mar 8, 2025 at 1:15=E2=80=AFPM -0600, Mike Katz via cctalk , wrote: > The HP Portable Plus computer ROM Drawer uses 28 pin 1MBit (128K) Mask > ROMs (TC531000) or 512KBit EPROMs (27C512). > > A few years ago a company called Personalized Software made something > called a ROMBO.=C2=A0 This was an adapter that allowed the use of a 32 Pin > 27C010 Quad Pack and plugged into the 28 pin socket on the ROM Drawer. > The down side of this was that the ROMBO needed a special EPROM > programmer to program.=C2=A0 Here is a link to a picture of the ROMBO.=C2= =A0 These > are no longer available. > > https://drive.google.com/file/d/1VKaWpfTIgDriStECXqfptBjHoL6wEmN6/view?usp= =3Dsharing > > I am thinking of doing something like the schematic linked below to use > a modern flash chip (AT28C010) in place of the 27010 and bring out the > three pins necessary for programming to jumpers that can be connected to > a flash programmer (or I might make an adapter board that the board > plugs into for programming). > > https://drive.google.com/file/d/18RsZPBJldTyxzjozVlO9okfpgOK7P2QT/view?usp= =3Dsharing > > Has anyone made anything like this for the portable plus or seen > something similar. > > I also have the following questions: > > 1.=C2=A0 Is there enough room in the ROM Drawer for some kind of socket on > the adapter board? > 2.=C2=A0 Where can I find the low profile pins used in the ROMBO? > 3.=C2=A0 Have I missed anything? > > Thank you... > > --===============3279927018072951044==-- From ard.p850ug1@gmail.com Sat Mar 8 21:35:44 2025 From: Tony Duell To: cctalk@classiccmp.org Subject: [cctalk] Re: ROM to Flash Adapter for HP Portable PC ROM Drawer help Date: Sat, 08 Mar 2025 21:35:26 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============5097626399531996557==" --===============5097626399531996557== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On Sat, Mar 8, 2025 at 7:25 PM Mike Katz via cctalk wrote: > > The HP Portable Plus computer ROM Drawer uses 28 pin 1MBit (128K) Mask > ROMs (TC531000) or 512KBit EPROMs (27C512). > > A few years ago a company called Personalized Software made something > called a ROMBO. This was an adapter that allowed the use of a 32 Pin > 27C010 Quad Pack and plugged into the 28 pin socket on the ROM Drawer. > The down side of this was that the ROMBO needed a special EPROM > programmer to program. Here is a link to a picture of the ROMBO. These > are no longer available. If it's any help, the ROMBO programmer was an unmodified 'SmartZap' running the standard firmware. There were 2 configuration modules supplied, one was the normal 27C512 one (a suitably-jumpered 28 pin header), the other was a differently-jumpered header with a flying lead ending in a 3 pin socket that fitted onto the middle 3 pins of the headed on the 27C010 module. For normal operation in the Portable Plus, pins 1-2 and 4-5 of that header were fitted with shorting links. I can send you reverse-engineered schematics of all parts if you need them. -tony --===============5097626399531996557==-- From van.snyder@sbcglobal.net Sat Mar 8 22:57:23 2025 From: Van Snyder To: cctalk@classiccmp.org Subject: [cctalk] Need a dot-matrix impact printer? Date: Sat, 08 Mar 2025 14:57:13 -0800 Message-ID: <9aa0d232284494267a213bb9c04e4c56d067c4df.camel@sbcglobal.net> In-Reply-To: <9aa0d232284494267a213bb9c04e4c56d067c4df.camel.ref@sbcglobal.net> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7389703614562506643==" --===============7389703614562506643== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Do you need to print on multi-part carbon or NCR forms? Do you need a dot-matrix impact printer? I have a Star Micronics SB-10 dot-matrix impact printer. It has a parallel interface. My late brother was using it so I assume it still works. None of my computers have a parallel port so I can't test it. Printer, cable, manual, spare ribbon, original shipping packaging. If you want it, it's yours for the price of a PDF shipping label, 20" x 20" x 10" 30 pounds. --===============7389703614562506643==-- From holm@freibergnet.de Sun Mar 9 09:15:07 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Sun, 09 Mar 2025 10:14:57 +0100 Message-ID: In-Reply-To: <760e536f-67fa-4246-8298-bb5b3a7c0023@jetnet.ab.ca> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============4868175022757768385==" --===============4868175022757768385== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit ben via cctalk wrote: > On 2025-03-08 8:09 a.m., emanuel stiebler via cctalk wrote: > > On 2025-03-07 15:36, Holm Tiffe via cctalk wrote: > > > Hi all, > > > > > > I'm dreaming to build sometimes my own Bit Slice CPU (when I have > > > spare time) > > > and I have collected several IC's in the last years for this purpose. > > > > There is a pretty quiet bitslice mailing list. Are you on it? > > Well it so quiet, I never heard about it. > Where is it? > Ben. bit-slicers(a)googlegroups.com Regards, Holm -- Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe, Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============4868175022757768385==-- From holm@freibergnet.de Sun Mar 9 09:24:12 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Sun, 09 Mar 2025 10:24:04 +0100 Message-ID: In-Reply-To: <3331e115-2230-4983-a4bf-f22649e0d4d9@jetnet.ab.ca> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3620592851638305182==" --===============3620592851638305182== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable ben via cctalk wrote: > On 2025-03-07 1:36 p.m., Holm Tiffe via cctalk wrote: > > Hi all, > >=20 > > I'm dreaming to build sometimes my own Bit Slice CPU (when I have spare t= ime) > > and I have collected several IC's in the last years for this purpose. > >=20 > > Today a small antistatic bag with 4x IDT49C402BG84 and two IDT 49C410J > > fell in my hands while I was sorting some stuff. > >=20 >=20 > You really want N3002N 2 bit, bit slices, 9 for 18 BITS, 10 for 20 BITS. Oh no... >=20 > > I know what they are and what they could do, they are able to help me > > to build a Bit Slice CPU w/o very large PCB's connecting hordes of 2901 e= tc. > > Besides of that they are CMOS and should draw much less power. > > But I have a problem with the 49C402: All datasheets that I could find > > until now, don't have the pinput auf that nice PGA84 package, there are > > DIP68, LCC/PLCC68 G68 or PG68 and QE68 "Cerquad" pinouts listet in every > > datasheet, but I have 4 chips in a PGA84 housing... > >=20 > if you must go to the dark side, 16 or 32 bit design pick up > a 16 bit alu in a PLCC 68 package. I have been doing a lot > of work with CPLD's ATF1508 and (the chips are easy to program) > are easy remove/insert into the sockets. > https://store.rosco-m68k.com/products/little-atf-programmer I have a bunch of collected stuff, including some Altera CPLD's and Atmel ATF's too.. >=20 > I had some 16 bit slices, but had problems with the 64 pin dip > package for a 20 bit cpu. I later tried a regular 2901's. > I also needed to use 22v10's all over the place. > The biggest problem was design had bus timing issues, > it worked for few minutes and then quit. I've tought about a first working example, just to get involved with the stuff.. maybe an digital clock just using an single AM2901 and an AM2910? ..just to keep the count of chips low..? >=20 >=20 > > This ebay page has pictures: https://www.ebay.com/p/10020043211 > > I don't have anything todo with the seller. > >=20 >=20 > Poland seems to have alot of odd stuff on ebay > like N3002's. Hint, Hint :) From time to time I've already buying stuff from poland, mut most of the things seems to go over allegro and not ebay. >=20 > While waiting for data, now is good time to think about software. > Ben. At first any Macroassembler should do the job for coding the bits in the control store, but even AMDASM and friends are laying around somwhere on my disks. I thin the time to talk about "real software" is when the cpu sucessfully adds it's first bytes.. [..] > PS. > I have older pcbs mostly working, of a 18 bit cpu ready to go to a good > home. > PPS. Still writing software, so the hardware is not ready to ship. You do > want a working bootstrap program! >=20 Nice. Regards, Holm --=20 Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,=20 Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============3620592851638305182==-- From holm@freibergnet.de Sun Mar 9 09:27:00 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Sun, 09 Mar 2025 10:26:53 +0100 Message-ID: In-Reply-To: <453293722.283956.1741383321228@email.ionos.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============4235109559428302028==" --===============4235109559428302028== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Will Cooke via cctalk wrote: > Digikey has the part listed ($166 each) and their page has a link to the da= tasheet that seems to have the pga package: >=20 > Digikey > https://www.digikey.com/en/products/detail/rochester-electronics-llc/49C402= GB/12112112 >=20 > Direct to Datasheet > https://rocelec.widen.net/view/pdf/rbdjetrmoo/IDTIS12976-1.pdf?t.download= =3Dtrue&u=3D5oefqw >=20 > Will No Will, those datasheets are not listing the pinout of the PG84 version. ..but in the Meantime I've found an Datasheet that lists it, put it on my Webspace: https://www.tiffe.de/htdocs/other/IDT49C402.pdf Kind Regards, Holm >=20 >=20 > > On 03/07/2025 4:04 PM EST Wayne S via cctalk wr= ote: > >=20 > > =20 > > Try here. > > Might have to create an account. > > > > IDT - 49C402BG84 > > jotrin.com > > [favicon.ico] > >=20 > > Sent from my iPhone > >=20 > > On Mar 7, 2025, at 12:42, Holm Tiffe via cctalk = wrote: > >=20 > > =EF=BB=BFHi all, > >=20 > > I'm dreaming to build sometimes my own Bit Slice CPU (when I have spare t= ime) > > and I have collected several IC's in the last years for this purpose. > >=20 > > Today a small antistatic bag with 4x IDT49C402BG84 and two IDT 49C410J > > fell in my hands while I was sorting some stuff. > >=20 > > I know what they are and what they could do, they are able to help me > > to build a Bit Slice CPU w/o very large PCB's connecting hordes of 2901 e= tc. > > Besides of that they are CMOS and should draw much less power. > > But I have a problem with the 49C402: All datasheets that I could find > > until now, don't have the pinput auf that nice PGA84 package, there are > > DIP68, LCC/PLCC68 G68 or PG68 and QE68 "Cerquad" pinouts listet in every > > datasheet, but I have 4 chips in a PGA84 housing... > >=20 > > This ebay page has pictures: https://www.ebay.com/p/10020043211 > > I don't have anything todo with the seller. > >=20 > > Can anyone help finding the pinout? > > The chips itself don't seem to that seldom... > >=20 > > Kind Regards, > > Holm > > -- > > Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe, > > Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 > > info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 >=20 > You just can't beat the person who never gives up. > Babe Ruth --=20 Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,=20 Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============4235109559428302028==-- From bfranchuk@jetnet.ab.ca Sun Mar 9 16:58:12 2025 From: ben To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Sun, 09 Mar 2025 10:58:03 -0600 Message-ID: <4b2302a4-a90e-430a-98b1-f769668240df@jetnet.ab.ca> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0815300442819500732==" --===============0815300442819500732== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On 2025-03-09 3:24 a.m., Holm Tiffe via cctalk wrote: > > At first any Macroassembler should do the job for coding the bits in the > control store, but even AMDASM and friends are laying around somwhere on > my disks. I thin the time to talk about "real software" is when the cpu > sucessfully adds it's first bytes.. Real hardware, needs a working front panel, and memory. Real software gets toggled in. Did the bootstrap loader that way into eeprom, once. Later I found space in a CPLD that I put the boot loader in. The real computer is it when halts with 3 in the AC, after adding 1 + 2. if you get 5, you are using large values of 2. if you get 42, you have mice problems. :) It takes a lot of work to get here on any cpu. Ben. --===============0815300442819500732==-- From holm@freibergnet.de Sun Mar 9 18:36:02 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Sun, 09 Mar 2025 19:35:53 +0100 Message-ID: In-Reply-To: <4b2302a4-a90e-430a-98b1-f769668240df@jetnet.ab.ca> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6788233163759843520==" --===============6788233163759843520== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable ben via cctalk wrote: > On 2025-03-09 3:24 a.m., Holm Tiffe via cctalk wrote: >=20 > >=20 > > At first any Macroassembler should do the job for coding the bits in the > > control store, but even AMDASM and friends are laying around somwhere on > > my disks. I thin the time to talk about "real software" is when the cpu > > sucessfully adds it's first bytes.. >=20 > Real hardware, needs a working front panel, and memory. No. No Front Panel. I want to use IDT71502 as loadable Control store, some small micro can load the microcode an can read back some Data. Maybe I can use my Z280 CP/M3 Eurocard System which can run amdasm and friends additionally, it has an SPI Interface which I put in some CPLD. > Real software gets toggled in. Yes, I know, Real Programmers don't use Pascal... (https://homepages.inf.ed.ac.uk/rni/papers/realprg.html) > Did the bootstrap loader > that way into eeprom, once. Later I found space in a CPLD that I put > the boot loader in. You forgot to mention that the front panel must use sim TIL311's .. > The real computer is it when halts with 3 in the AC, after adding 1 + 2. > if you get 5, you are using large values of 2. You've got some Intel-FPU? > if you get 42, you have mice problems. :) I have two red cats, not expecting mice problems at all. > It takes a lot of work to get here on any cpu. > Ben. Yes I know, but technical problems arent my biggest, the biggest problem is spare time. Maybe I can use some other ppls. work? https://www.tiffe.de/images/GEBS-1.jpg https://www.tiffe.de/images/GEBS-2.jpg https://www.tiffe.de/images/GEBS-3.jpg That's an Bitslice CPU using an AM2910 in the CCU and four AM29203 in the Datapath. Made from GE. That thing seems to be german made "Grundbaugrupp= e" (base unit) "GE2149G206" Mnr. 10488 Haven't found any information about it, came from ebay. There are other possibilities, two stacked boards "MP Microcontroller/B" using 8 pcs. AM2901B that came out of an Vector Graphics Subsystem crate for PDP11/VAX/Data General frm a Microtek Corp.. https://bitsavers.org/pdf/megatek/7000/7000_197806.jpg https://bitsavers.org/pdf/megatek/7000/boards/CPU/ (THX Al. Kossow!) I've got only the crate with the boards, w/o PSU, Keyboard/Display or housing..in relativly bad shape (partially corroded). I have to do reverse engeneering on the boards first.. Regards, Holm --=20 Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,=20 Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============6788233163759843520==-- From glen.slick@gmail.com Mon Mar 10 00:30:30 2025 From: Glen Slick To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Sun, 09 Mar 2025 17:30:12 -0700 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8185796374537711127==" --===============8185796374537711127== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Sun, Mar 9, 2025 at 1:27=E2=80=AFAM Holm Tiffe via cctalk wrote: > > No Will, those datasheets are not listing the pinout of the PG84 > version. ..but in the Meantime I've found an Datasheet that lists it, > put it on my Webspace: > https://www.tiffe.de/htdocs/other/IDT49C402.pdf See also Section 11.1, Page 4 (Page 685 of the PDF) http://www.bitsavers.org/components/idt/_dataBooks/1995_IDT_High-Performance_= Logic_Data_Book.pdf --===============8185796374537711127==-- From bfranchuk@jetnet.ab.ca Mon Mar 10 01:35:34 2025 From: ben To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Sun, 09 Mar 2025 19:35:22 -0600 Message-ID: <69d245d6-069a-4fed-ad0c-cfe5dd784609@jetnet.ab.ca> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1180263279615575378==" --===============1180263279615575378== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On 2025-03-09 12:35 p.m., Holm Tiffe via cctalk wrote: > Yes, I know, Real Programmers don't use Pascal... > (https://homepages.inf.ed.ac.uk/rni/papers/realprg.html) > Reads the paper. Taped to the wall is a line-printer Snoopy calendar for the year 1969. Looks Arg !!! Mine is Spock from 1973. http://www.users.on.net/~farnik/wikicgi/wiki.pl?SnoopyCalendar > You forgot to mention that the front panel must use sim TIL311's .. You find your own stash! You are not getting mine. I just love them, but mine are defective they just display in octal :) > Yes I know, but technical problems arent my biggest, the biggest problem > is spare time. Trade you my extra spare time, for some 'round to-its'. > Regards, > Holm Ben. --===============1180263279615575378==-- From holm@freibergnet.de Mon Mar 10 07:50:57 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Mon, 10 Mar 2025 08:50:50 +0100 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============4123663411846033866==" --===============4123663411846033866== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Glen Slick via cctalk wrote: > On Sun, Mar 9, 2025 at 1:27=E2=80=AFAM Holm Tiffe via cctalk > wrote: > > > > No Will, those datasheets are not listing the pinout of the PG84 > > version. ..but in the Meantime I've found an Datasheet that lists it, > > put it on my Webspace: > > https://www.tiffe.de/htdocs/other/IDT49C402.pdf >=20 > See also Section 11.1, Page 4 (Page 685 of the PDF) >=20 > http://www.bitsavers.org/components/idt/_dataBooks/1995_IDT_High-Performanc= e_Logic_Data_Book.pdf Yes, saved that. It's possible that the datasheet I've linked above is part of this databook. The problem is, that there are many links for 49C402 Datasheets on the net, but almost none of them is including that PGA84 Pinout. Regards, Holm --=20 Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,=20 Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============4123663411846033866==-- From holm@freibergnet.de Mon Mar 10 07:55:27 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Mon, 10 Mar 2025 08:55:20 +0100 Message-ID: In-Reply-To: <69d245d6-069a-4fed-ad0c-cfe5dd784609@jetnet.ab.ca> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8584045580423141692==" --===============8584045580423141692== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit ben via cctalk wrote: > On 2025-03-09 12:35 p.m., Holm Tiffe via cctalk wrote: > > > > Yes, I know, Real Programmers don't use Pascal... > > (https://homepages.inf.ed.ac.uk/rni/papers/realprg.html) > > > Reads the paper. > > Taped to the wall is a line-printer Snoopy calendar for the year 1969. > > Looks Arg !!! Mine is Spock from 1973. > > http://www.users.on.net/~farnik/wikicgi/wiki.pl?SnoopyCalendar ...dead link from my side. > > > You forgot to mention that the front panel must use sim TIL311's .. > > You find your own stash! You are not getting mine. > I just love them, but mine are defective they just display in octal :) I own a small amount of them, much more hp5082-7359, and no, don't want to trade them. Nevertheless I don't think I need a front panel. > > > Yes I know, but technical problems arent my biggest, the biggest problem > > is spare time. > > Trade you my extra spare time, for some 'round to-its'. Don't know what you mean.. Regards, Holm -- Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe, Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============8584045580423141692==-- From Martin.Hepperle@dlr.de Mon Mar 10 10:07:41 2025 From: Martin.Hepperle@dlr.de To: cctalk@classiccmp.org Subject: [cctalk] Re: ROM to Flash Adapter for HP Portable PC ROM Drawer help Date: Mon, 10 Mar 2025 10:00:25 +0000 Message-ID: <2df41369c02d4bc2ac5e5e9001d67663@dlr.de> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2117762509372172447==" --===============2117762509372172447== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Mike, you might also want to have a look at https://www.hpmuseum.org/forum/thread-15356.html For testing , I have used a regular EPROM mounted on an external PCB and conn= ected it with a ribbon cable to the ROM drawer. There are ribbon cable - DIP = connectors with thin pins, which can be used without destroying the sockets i= nside the ROM drawer. You should not use normal pin headers as these pins are too thick and will da= mage the sockets. Unfortunately, many replacement solutions use such headers. You can buy individual, thin pins, but these are relatively expensive (e.g. a= t Mouser). The height of a replacement should be similar to a normal EPROM, so a thin PC= B with a flat SMC Flash RAM might be a viable solution. This will also requir= e a programming adapter. On the other hand, 128 KB capacity is still rather limited - e.g. Turbo-C hea= der files are too large to fit into one EPROM, even if compressed by removing= comments and whitespace. However, it should be possible to link software over two 128K modules, as was= obviously done with Word Perfect in the days (see the Portable Paper). This = linking requires some modification of the FAT entries in the image files, whi= ch I have not yet tried. Martin --===============2117762509372172447==-- From jeffrey@vcfed.org Wed Mar 12 02:19:02 2025 From: Jeffrey Brace To: cctalk@classiccmp.org Subject: [cctalk] VCF West 2025 Survey - Mountain View, California Date: Tue, 11 Mar 2025 22:18:35 -0400 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8284049256726428919==" --===============8284049256726428919== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit SAVE THE DATE! VCF West is back on August 1 & 2, 2025 at the Computer History Museum in Mountain View, California. Please fill out this survey to help us with planning: https://forms.gle/R1kSCsVqEyZfgQ4Q8 This survey is for everyone! We have started plans to make VCF West a bigger, better, and more unique show than we ever have before! We're partnering with the Sacramento Amiga Computer Club and AmiWest to celebrate the 40th anniversary of the Amiga and other special guests. We will have quality speakers, a large consignment area, exhibits galore and our Friday Night Social. Exhibit space will, however, be limited so we are going to be selective in the process. There is still room for talks so if you're interested or know someone who is, please let us know at vcfwest(a)vcfed.org We're looking forward to seeing you there! Take care! Jeff Brace VCF National Board Member Chairman & Vice President VCF East Showrunner MARCH Fundraising Manager Vintage Computer Federation is a 501c3 charity https://vcfed.org/ --===============8284049256726428919==-- From mjd.bishop@emeritus-solutions.com Wed Mar 12 14:27:44 2025 From: Martin Bishop To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Wed, 12 Mar 2025 14:27:33 +0000 Message-ID: <4f049583c39448a2a39b398607b455e2@emeritus-solutions.com> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0452949690413268312==" --===============0452949690413268312== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable For a Meta Assembler you may find https://hamblen.ece.gatech.edu/book/wintim/= index.html useful, its useable and the source is available (as VS6 C++). If you have AmdAsm sources, esp suitable for building with gcc, I would be in= terested in making their acquaintance. You may find FPGAs and their infrastructure useful. Beyond the simulators (M= odelSim, etc), there is logic analyser IP which can be used on both VLIW sequ= encers / scalar mills in the fabric and on external circuitry. Xilinx Vivado = is a reasonable toolset to start with. For dev boards Artix-7 or Zynq boards= on AliExpress may meet your needs. Personally, I use the AM2910 and suchlike as a legacy example and roll my own= sequencer design / instructions. The FPGA fabric provides fast MAC elements= (eg DSP48), and dual port RAM (in 36 kb chunks) for both control and data me= mory. Best Regards Martin -----Original Message----- From: Holm Tiffe via cctalk [mailto:cctalk(a)classiccmp.org]=20 Sent: 09 March 2025 09:24 To: General Discussion: On-Topic and Off-Topic Posts Cc: Holm Tiffe Subject: [cctalk] Re: IDT 49C402BG84 Pinout? << snip >> At first any Macroassembler should do the job for coding the bits in the cont= rol store, but even AMDASM and friends are laying around somwhere on my disks= . I thin the time to talk about "real software" is when the cpu sucessfully a= dds it's first bytes.. < Regards, Holm --=20 Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,=20 Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============0452949690413268312==-- From elson@pico-systems.com Wed Mar 12 15:09:45 2025 From: Jon Elson To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Wed, 12 Mar 2025 10:09:38 -0500 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6512313513206356965==" --===============6512313513206356965== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On 3/9/25 04:14, Holm Tiffe via cctalk wrote: > ben via cctalk wrote: > >> On 2025-03-08 8:09 a.m., emanuel stiebler via cctalk wrote: >>> On 2025-03-07 15:36, Holm Tiffe via cctalk wrote: >>>> Hi all, >>>> >>>> I'm dreaming to build sometimes my own Bit Slice CPU (when I have >>>> spare time) >>>> and I have collected several IC's in the last years for this purpose. In about 1982 I built a 32-bit bit slice machine using 8 X 2903 and a 2910 sequencer.  I had it set up with 1K of 96-bit wide control store, and it ran 2-address operations at 8 MHz and 3-address at 6 MHz.  See : http://pico-systems.com/stories/1982.html  for some text and photos. Unfortunately, I badly underestimated the effort to get a complete system based on this working and abandoned the project. I did have a console program that ran on CP/M that could load microcode, load and examine registers, and start the micromachine.  I then had to build a memory interface and system bus controller, and add a few small details for instruction dispatch and instruction fetching optimization.  THEN** I had to figure out some way to get a Pascal compiler for the 360 architecture and create an OS and utilities.  A big job! Jon --===============6512313513206356965==-- From captainkirk359@gmail.com Wed Mar 12 18:39:54 2025 From: Christian Gauger-Cosgrove To: cctalk@classiccmp.org Subject: [cctalk] DEC CP11-U (M7824) Documentation? Date: Wed, 12 Mar 2025 14:39:11 -0400 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8811267191247066271==" --===============8811267191247066271== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Hello all, I'm curious, does anyone have any documentation on the CP11 card punch option? From the '91 Edited Option Module List and various iterations of the "Field Guide to QBUS and UNIBUS Modules" that it's: 1. A card punch, 2. A UNIBUS device, and; 3. It uses the M7824 board. I'm most particularly interested in if anyone has any programming information on it. Best regards, Christian -- Christian M. Gauger-Cosgrove STCKON08DS0 Contact information available upon request. --===============8811267191247066271==-- From paulkoning@comcast.net Wed Mar 12 19:19:33 2025 From: Paul Koning To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC CP11-U (M7824) Documentation? Date: Wed, 12 Mar 2025 15:19:15 -0400 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8450425216516817966==" --===============8450425216516817966== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable > On Mar 12, 2025, at 2:39=E2=80=AFPM, Christian Gauger-Cosgrove via cctalk <= cctalk(a)classiccmp.org> wrote: >=20 > Hello all, >=20 > I'm curious, does anyone have any documentation on the CP11 card punch > option? From the '91 Edited Option Module List and various iterations > of the "Field Guide to QBUS and UNIBUS Modules" that it's: > 1. A card punch, > 2. A UNIBUS device, and; > 3. It uses the M7824 board. >=20 > I'm most particularly interested in if anyone has any programming > information on it. >=20 > Best regards, > Christian > --=20 > Christian M. Gauger-Cosgrove > STCKON08DS0 > Contact information available upon request. The 1975 option/module list shows CP11-UP to be a product from "Special Syste= ms, California", a "Punch interface for Univac 1710 card rdr/punch". I had never heard of card punches for PDP-11 systems. I assume SSCAL is some= thing like CSS only more obscure. Most other DEC card punch products shown i= n that list are CSS options, but there is another from SSCAL, the CP20-E whic= h is a controller for the Data Products 120 punch. Curiously, given the mode= l designation, the "used on" column says it's a PDP-15 peripheral. Both are = shown as being the work of Bob Edwards of SSCAL. The product status is "3 --= Custom build". paul --===============8450425216516817966==-- From captainkirk359@gmail.com Wed Mar 12 23:42:44 2025 From: Christian Gauger-Cosgrove To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC CP11-U (M7824) Documentation? Date: Wed, 12 Mar 2025 19:42:02 -0400 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7407537471519112212==" --===============7407537471519112212== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Good evening (at least it's evening for me when I'm writing this), On Wed, 12 Mar 2025 at 15:25, Paul Koning via cctalk wrote: > The 1975 option/module list shows CP11-UP to be a product from "Special Sys= tems, California", a "Punch interface for Univac 1710 card rdr/punch". > The 1983 option/module list agrees entirely. Looking it up, it looks like the Univac 1710 was a keypunch. So it's not a dedicated punch like a Documation P100. The "Where Used" column definitely shows "11" so it appears to have been intended for the PDP-11, and not the KS10. Interesting, and curious. > I had never heard of card punches for PDP-11 systems. I assume SSCAL is so= mething like CSS only more obscure. Most other DEC card punch products shown= in that list are CSS options, but there is another from SSCAL, the CP20-E wh= ich is a controller for the Data Products 120 punch. Curiously, given the mo= del designation, the "used on" column says it's a PDP-15 peripheral. Both ar= e shown as being the work of Bob Edwards of SSCAL. The product status is "3 = -- Custom build". > So I'm going to guess then, that documentation for the CP11-UP is going to be absolutely unobtainable. Unfortunate. The 1983 option/module list lists two CP20-E_ entries, with description "CP20-C_ + DIB20" and then 120V, 60Hz or 240V, 50Hz power. The CP20-C_ entries just above list in their description "Documation P100 100cpm punch, CP10-DA controller, a Terra Cotta coloured H9502 cab" and 120 or 240 power. There's also a CP20-D_ pair that is equivalent to the CP20-E_ pair, but using the CP20-B_; and the CP20-B_ are the same as the CP20-C_, except the cabinets are in Blasi Blue. So it looks like the CP20 is just a rename for the older CP10, paired up with a DIB20 to let it run on a KL10B. Regards, Christian -- Christian M. Gauger-Cosgrove STCKON08DS0 Contact information available upon request. --===============7407537471519112212==-- From holm@freibergnet.de Thu Mar 13 11:36:21 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 12:36:14 +0100 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7683300397442013630==" --===============7683300397442013630== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Jon Elson via cctalk wrote: > On 3/9/25 04:14, Holm Tiffe via cctalk wrote: > > ben via cctalk wrote: > >=20 > > > On 2025-03-08 8:09 a.m., emanuel stiebler via cctalk wrote: > > > > On 2025-03-07 15:36, Holm Tiffe via cctalk wrote: > > > > > Hi all, > > > > >=20 > > > > > I'm dreaming to build sometimes my own Bit Slice CPU (when I have > > > > > spare time) > > > > > and I have collected several IC's in the last years for this purpos= e. >=20 > In about 1982 I built a 32-bit bit slice machine using 8 X 2903 and a 2910 > sequencer.=C2=A0 I had it set up with 1K of 96-bit wide control store, and = it ran > 2-address operations at 8 MHz and 3-address at 6 MHz.=C2=A0 See : > http://pico-systems.com/stories/1982.html=C2=A0 for some text and photos. :-) Yes Jon, I've already knew this story. This coming from gathering information about the AMD Bitslices from around the world... >=20 > Unfortunately, I badly underestimated the effort to get a complete system > based on this working and abandoned the project. I did have a console > program that ran on CP/M that could load microcode, load and examine > registers, and start the micromachine.=C2=A0 I then had to build a memory > interface and system bus controller, and add a few small details for > instruction dispatch and instruction fetching optimization.=C2=A0 THEN** I = had to > figure out some way to get a Pascal compiler for the 360 architecture and > create an OS and utilities.=C2=A0 A big job! >=20 > Jon >=20 Ok, this is a full fledged mainframe CPU.. not really what I want todo first. That stuff tends to "explode" in sight of parts, needed power and space, I know that. On the other side I saw different controllers for PDP11/VAX stuff that used the 290x to control "hardware". That are microprogrammed computers w/o any system bus and macro-instructions. Even the controller of an DEC RX01 RX02 is build around two AM2901. (I'm a former east german from "behind the iron curtain" and I own something like a russian PDP11/23 clone, an "Elektronika E60" that was used from a east german company "Carl Zeiss Jena" which had an dependance in my hometown to steer an X-Ray Spectrometer. The russian dual 8" floppy drive has also 2 pcs. of K1084BC1 .. AM2901) My first idea is to build a digital clock with a single 2901 - only micro programmed. Ok, it's total nonsense.. but all what we do here is playing with some outdated stuff, so where this clock.. I hope that I could do this with an single 2901 RALU, that means I have to calculate twice for 8 Bits, like the ALU in a Z80... Later I could try to build something with the 49C402, AM29116 or WS59032 to save PCB space.. All that stuff is already in my stash of parts, besides many 2901,2903,2909,11,10 etc... Maybe I'm trying to get that PCB with the four AM29203 and AM2910 from GE to life first. Regards, Holm --=20 Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,=20 Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============7683300397442013630==-- From elson@pico-systems.com Thu Mar 13 14:54:16 2025 From: Jon Elson To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 09:54:06 -0500 Message-ID: <7f922f88-d2cc-8428-66f2-8b67d521539e@pico-systems.com> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0125222610054592936==" --===============0125222610054592936== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On 3/13/25 06:36, Holm Tiffe via cctalk wrote: > > Ok, this is a full fledged mainframe CPU.. not really what I want todo firs= t. > That stuff tends to "explode" in sight of parts, needed power and space, > I know that. > On the other side I saw different controllers for PDP11/VAX stuff that > used the 290x to control "hardware". That are microprogrammed computers > w/o any system bus and macro-instructions. Even the controller of an DEC > RX01 RX02 is build around two AM2901. > (I'm a former east german from "behind the iron curtain" and I own something > like a russian PDP11/23 clone, an "Elektronika E60" that was used from a > east german company "Carl Zeiss Jena" which had an dependance in my > hometown to steer an X-Ray Spectrometer. The russian dual 8" floppy > drive has also 2 pcs. of K1084BC1 .. AM2901) > My first idea is to build a digital clock with a single 2901 - > only micro programmed. Ok, it's total nonsense.. but all what we do here > is playing with some outdated stuff, so where this clock.. > I hope that I could do this with an single 2901 RALU, that means I have > to calculate twice for 8 Bits, like the ALU in a Z80... > > Later I could try to build something with the 49C402, AM29116 or WS59032 > to save PCB space.. All that stuff is already in my stash of parts, > besides many 2901,2903,2909,11,10 etc... > Maybe I'm trying to get that PCB with the four AM29203 and AM2910 from > GE to life first. > The 2903 was a VERY nice bit slice chip, it could do=20 single-cycle multiply and divide, as it had an extra shift=20 register for the multiplier bits.=C2=A0 The 29203 is pin=20 compatible, but faster.=C2=A0 Once I got the whole system=20 running, I planned to upgrade to the 29203. I had planned to=20 make device controllers with 4 74S181s and a dual-port ram=20 chip for registers, and the control store would be 27C32=20 EPROMs of the fastest grade.=C2=A0 I was hoping to get 4 MIPS=20 from these. Of course, now this could all be built on a few FPGAs, and=20 get vastly higher performance. Yes, a small peripheral controller would be a much more=20 practical project. Jon --===============0125222610054592936==-- From paulkoning@comcast.net Thu Mar 13 15:00:31 2025 From: Paul Koning To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 11:00:12 -0400 Message-ID: <1AEDF6D6-65EC-4E49-8997-3D3AB41B1589@comcast.net> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6458772493942568725==" --===============6458772493942568725== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable > On Mar 13, 2025, at 7:36=E2=80=AFAM, Holm Tiffe via cctalk wrote: >=20 > ... > Ok, this is a full fledged mainframe CPU.. not really what I want todo firs= t. > That stuff tends to "explode" in sight of parts, needed power and space, > I know that. > On the other side I saw different controllers for PDP11/VAX stuff that > used the 290x to control "hardware". That are microprogrammed computers > w/o any system bus and macro-instructions. Even the controller of an DEC > RX01 RX02 is build around two AM2901. I can think of several places where DEC used 2901 designs. One is the VAX 73= 0. One of the PostScript laser printers also used these, I think -- LPS20 pe= rhaps? Not the LPS40, that was a microVAX running VaxELAN based firmware. Another, and an interesting one, is the UDA50. It has a 16 bit engine using = 4 2901s plus a 2910 sequencer. My mentor Anton Chernoff worked on the microc= ode for it and showed me some of it. I remember it had a specialized assembl= er where the ALU opcode (for the 2901) was in the left half of the line, and = the sequencer opcode (for the 2910) in the right half, separated by a semicol= on. The 2901 had condition codes, which were transferred to the 2910 for con= ditional branches, but with a one cycle delay at least in the UDA50. So you = could see weird stuff like this: clr r1 ; bne foo because the conditional branch would act on the condition codes set by the pr= eceding line's ALU part. The UDA50 had an implementation, in a tiny amount of microcode, for a small 1= 6-bit microprocessor instruction set. I think it was roughly a very much sim= plified PDP-11. That was used for various downloadable diagnostics and servi= ce tools, like a disk formatter. Richie Lary of PDP-8 fame wrote that part o= f the microcode. paul --===============6458772493942568725==-- From holm@freibergnet.de Thu Mar 13 16:12:45 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 17:12:38 +0100 Message-ID: In-Reply-To: <1AEDF6D6-65EC-4E49-8997-3D3AB41B1589@comcast.net> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0801829899681078189==" --===============0801829899681078189== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Paul Koning via cctalk wrote: >=20 >=20 > > On Mar 13, 2025, at 7:36=E2=80=AFAM, Holm Tiffe via cctalk wrote: > >=20 > > ... > > Ok, this is a full fledged mainframe CPU.. not really what I want todo fi= rst. > > That stuff tends to "explode" in sight of parts, needed power and space, > > I know that. > > On the other side I saw different controllers for PDP11/VAX stuff that > > used the 290x to control "hardware". That are microprogrammed computers > > w/o any system bus and macro-instructions. Even the controller of an DEC > > RX01 RX02 is build around two AM2901. >=20 > I can think of several places where DEC used 2901 designs. One is the VAX = 730. One of the PostScript laser printers also used these, I think -- LPS20 = perhaps? Not the LPS40, that was a microVAX running VaxELAN based firmware. The FPU's of PDP11's and the VAX11/780 used them too. As far as I remember there where 16 pcs of 2901 on the FPU board. (Sorry, I only know the boards of a east german copy of the 11/780, the Robotron RVS K1840). The terminal multiplexers even had some AM2901, don't remember how many for now. After the fall of the iron curtain DEC hired all (!) employees from Robotron Dresden "I'ts is a masterpeace of knowldge to copy an VAX11/780 with only a reference machine at the hand.." I was one of the last administrators of the two K1840 fom our University in Freiberg, east germany. The TU Bergakademie Freiberg is the oldest university of mining and metallurgy in the world. We ran those puppies an MUTOS 1800 (4.3BSD), not SVP 1800 (VMS). The AMD29xx Chips in those machines where soviet products. >=20 > Another, and an interesting one, is the UDA50. It has a 16 bit engine usin= g 4 2901s plus a 2910 sequencer. My mentor Anton Chernoff worked on the micr= ocode for it and showed me some of it. I remember it had a specialized assem= bler where the ALU opcode (for the 2901) was in the left half of the line, an= d the sequencer opcode (for the 2910) in the right half, separated by a semic= olon. The 2901 had condition codes, which were transferred to the 2910 for c= onditional branches, but with a one cycle delay at least in the UDA50. So yo= u could see weird stuff like this: >=20 > clr r1 ; bne foo >=20 > because the conditional branch would act on the condition codes set by the = preceding line's ALU part. >=20 > The UDA50 had an implementation, in a tiny amount of microcode, for a small= 16-bit microprocessor instruction set. I think it was roughly a very much s= implified PDP-11. That was used for various downloadable diagnostics and ser= vice tools, like a disk formatter. Richie Lary of PDP-8 fame wrote that part= of the microcode. >=20 > paul >=20 Yes. There was AMDASM as an example (CP/M based). But today every macro capable Assembler should do the job. It is only about defining the function codes of ALU and Sequencer in Macros.. Regards, Holm --=20 Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,=20 Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============0801829899681078189==-- From holm@freibergnet.de Thu Mar 13 16:47:16 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 17:47:08 +0100 Message-ID: In-Reply-To: <7f922f88-d2cc-8428-66f2-8b67d521539e@pico-systems.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6760636118526873869==" --===============6760636118526873869== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Jon Elson via cctalk wrote: [..] > >=20 > > Later I could try to build something with the 49C402, AM29116 or WS59032 > > to save PCB space.. All that stuff is already in my stash of parts, > > besides many 2901,2903,2909,11,10 etc... > > Maybe I'm trying to get that PCB with the four AM29203 and AM2910 from > > GE to life first. > >=20 > The 2903 was a VERY nice bit slice chip, it could do single-cycle multiply > and divide, as it had an extra shift register for the multiplier bits. ...and you can expand the Registers externally with AM29705 (AM29707) >=C2=A0 The > 29203 is pin compatible, but faster.=C2=A0 Once I got the whole system runn= ing, I > planned to upgrade to the 29203. I had planned to make device controllers > with 4 74S181s and a dual-port ram chip for registers, and the control store > would be 27C32 EPROMs of the fastest grade.=C2=A0 I was hoping to get 4 MIP= S from > these. The 49C402 has an expanded Register set (64 words instead of 16), an double set of ALU Commands. Don't know if it is the same as on the 2903/203. It con= tains the carry readahed circuity too and is 60% faster IDT says... The 27C32 would be the bottleneck. I've bought some used AM27C291 in the past (and compatible Parts from Cypress and TI). I've pesteres the german company Conitec to implement device support for those for ther GALEP Devices. Send 10 chips to them and got a Mail later that they would need more..they where noe all defective now... The Read Support was added for the GALEP III and IV ..but I'm would'nt pay additionally and finally build a prommer fort those differential Eproms myself. I'ts working and no Chip hat to die for it... But even with those Eproms (25..55ns) it would be impractical to build an control store for a single experimental device out of it. I've build an control store out of old cache RAMs (8kx8). (A friend of mine collected many of them for me..out of old 486 Mainboards) An Atmega16 with an 4Mbit Atmel Dataflash could store the Microcode and load it in the WCS. There are still some Pipeline Registers to solder in and finally to write the Software for the AVR. ..it's laying around for years now. :-| This all was before I knew about IDT71502 WCS Chips that include serial shift registers.. We had an Company here in Germany that sold used chips from recycled pcbs one..the new management endet this. But before it ended I've bought a bunch of them, besides things like J11, Bus drivers AM29828 and much other things for a very small amount of bucks. (From the point I've told them that I wanted the chips to build something out= of it and I'm not interrested to only look at nice gold ceramic Chips w/o any scratches..it seems that they send me the best looking Ic's they had.. :-) ) >=20 > Of course, now this could all be built on a few FPGAs, and get vastly higher > performance. That's the point where the fun ends..at least for me. Yes, I've done some designs on Altera CPLDs (schematic entry only), bought a book about Verilog and one about VHDL .. but spare time is low... I don't even want to build a "fast" computer ...nice if it's fast, but it isn't necessary. I'm sitting on a PC with an Ryzen 5-3600 and 64Gbyte RAM (no, no Flash disk, but a RAID arry of fast SAS "spinning rust" disks..) >=20 > Yes, a small peripheral controller would be a much more practical project. >=20 > Jon Exactly. First is to get something running.. In the old AM29xx Docs (Donnamaye E. White) are even "controllers" described that don't use any ALU at all, but an AM2910 only. As long you don't have to shuffle some data, this will be sufficient.. (Coffee machine?) Regards, Holm --=20 Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,=20 Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============6760636118526873869==-- From bfranchuk@jetnet.ab.ca Thu Mar 13 18:09:36 2025 From: ben To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 12:09:22 -0600 Message-ID: <4da0055a-806d-442a-97b0-2bab781d3165@jetnet.ab.ca> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8180838634012698723==" --===============8180838634012698723== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On 2025-03-13 10:47 a.m., Holm Tiffe via cctalk wrote: >> Of course, now this could all be built on a few FPGAs, and get vastly high= er >> performance. Most designs seem to 8 bitter's, and all memory fits in block ram. Once you hit external ram/rom things slow down again. >=20 > That's the point where the fun ends..at least for me. Yes, I've done > some designs on Altera CPLDs (schematic entry only), bought a book about > Verilog and one about VHDL .. but spare time is low... >=20 ADHL is a nice way to program CPLD's and FPGA's. I tried using Altera fpga's, but routing never worked reliable for me. Since every brand of FPGA is just a little different, I never could=20 port stuff using Verlog or VHDL. WinCUPL is what I use to program CPLD's (Amtel) now. > I don't even want to build a "fast" computer ...nice if it's fast, but > it isn't necessary. > I'm sitting on a PC with an Ryzen 5-3600 and 64Gbyte RAM (no, no Flash > disk, but a RAID arry of fast SAS "spinning rust" disks..) For building stuff, your choice of crystal oscillators is really limited so you are stuck with common speeds. Making it fast might not be=20 possible if your timing is off by a few nS and you have to pick the next slower sized oscillator. >> >> Yes, a small peripheral controller would be a much more practical project. >> >> Jon I keep thinking of a old 7 track mag tape drive replacement, with fake spinning reels and compact flash card hidden inside. 9 track would have wi-fi to the cloud. > Exactly. > First is to get something running.. >=20 > In the old AM29xx Docs (Donnamaye E. White) are even "controllers" > described that don't use any ALU at all, but an AM2910 only. > As long you don't have to shuffle some data, this will be sufficient.. > (Coffee machine?) Come on, use a PI for the coffee machine, it has to be connected to the net so the world knows when the brew is done. :) > Regards, > Holm >=20 Ben. --===============8180838634012698723==-- From mjd.bishop@emeritus-solutions.com Thu Mar 13 18:24:57 2025 From: Martin Bishop To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 18:24:31 +0000 Message-ID: In-Reply-To: <7f922f88-d2cc-8428-66f2-8b67d521539e@pico-systems.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============9074663185998389361==" --===============9074663185998389361== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable One FPGA will easily do a VLIW sequencer + scalar mills (one or more, memory = / MAC assemblies) or a simple processor Something like https://www.aliexpress.com/item/1005005779045608.html provides= a wholly adequate platform for a microcoded processor, with lots of 3v3 IO f= or external logic analysis inputs Martin -----Original Message----- From: Jon Elson via cctalk [mailto:cctalk(a)classiccmp.org]=20 Sent: 13 March 2025 14:54 To: Holm Tiffe via cctalk Cc: Jon Elson Subject: [cctalk] Re: IDT 49C402BG84 Pinout? << snip >> Of course, now this could all be built on a few FPGAs, and get vastly higher = performance. Yes, a small peripheral controller would be a much more practical project. Jon --===============9074663185998389361==-- From bfranchuk@jetnet.ab.ca Thu Mar 13 19:29:01 2025 From: ben To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 13:28:38 -0600 Message-ID: <5be791b5-c661-4900-b991-003cbdd3ac3a@jetnet.ab.ca> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3141532899527556578==" --===============3141532899527556578== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On 2025-03-13 12:24 p.m., Martin Bishop via cctalk wrote: > One FPGA will easily do a VLIW sequencer + scalar mills (one or more, memor= y / MAC assemblies) or a simple processor When it works. I see lots low cost Chinese FPGA cards, so that is valid option. > Something like https://www.aliexpress.com/item/1005005779045608.html provid= es a wholly adequate platform for a microcoded processor, with lots of 3v3 IO= for external logic analysis inputs They goofed on that, 3 volt transistor logic is negative. :) I really wonder what is used in a Industrial Setting now days, HTL logic=20 is long gone. > Martin A simple processor is 24 bits or less for me. One can ind lots of emulation but very little real hardware in a fpga. https://www.fpgaretrocomputing.org/ From when you could get a FPGA with 5 volt I/O and sane packaging and easy to use floor planning. What may be a valid option with a FPGA, is to design a computer with programmable microcode into block ram. Then you could have PDP XYZ, IBM 360, A ALGOL machine,ect. Ben. --===============3141532899527556578==-- From paulkoning@comcast.net Thu Mar 13 19:36:21 2025 From: Paul Koning To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 15:36:04 -0400 Message-ID: In-Reply-To: <5be791b5-c661-4900-b991-003cbdd3ac3a@jetnet.ab.ca> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============4193704128410409132==" --===============4193704128410409132== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable > On Mar 13, 2025, at 3:28=E2=80=AFPM, ben via cctalk wrote: >=20 > On 2025-03-13 12:24 p.m., Martin Bishop via cctalk wrote: >> One FPGA will easily do a VLIW sequencer + scalar mills (one or more, memo= ry / MAC assemblies) or a simple processor >=20 > When it works. > I see lots low cost Chinese FPGA cards, so that is valid option. >=20 >> Something like https://www.aliexpress.com/item/1005005779045608.html provi= des a wholly adequate platform for a microcoded processor, with lots of 3v3 I= O for external logic analysis inputs >=20 > They goofed on that, 3 volt transistor logic is negative. :) Depends on which one. RTL was 3.6 volts positive, as far as I can remember. = I actually have a keyboard that has some of those devices in it. Yes, ECL i= s around 3 volts also but negative supply. And of course some people designe= d systems with positive supplies but "negative" logic, in the sense that ~0 v= olts is logic 1 while near-VCC is logic 0; the CDC 6000 series machines are a= n example. FPGAs come in amazing sizes if you have sufficient money. I hope some day to= cram an entire CDC 6600 into an FPGA. The main problem with this isn't FPGA= sizes (by today's standards, an upper-midrange FPGA can do the job, memory i= ncluded) but rather the creation of an accurate model given the bizarre and h= airy timing of that machine. I have a gate level model, but it doesn't work = yet because of those issues. paul --===============4193704128410409132==-- From mhs.stein@gmail.com Thu Mar 13 19:37:33 2025 From: Mike Stein To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 15:37:16 -0400 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0412476380292570038==" --===============0412476380292570038== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit ISTR that some time ago I read mention here about an EPROM fast enough to approach PROM speeds; anyone share that recollection, or even have a source/part no.? On Thu, Mar 13, 2025 at 12:47 PM Holm Tiffe via cctalk < cctalk(a)classiccmp.org> wrote: > Jon Elson via cctalk wrote: > > [..] > > > > > > Later I could try to build something with the 49C402, AM29116 or > WS59032 > > > to save PCB space.. All that stuff is already in my stash of parts, > > > besides many 2901,2903,2909,11,10 etc... > > > Maybe I'm trying to get that PCB with the four AM29203 and AM2910 from > > > GE to life first. > > > > > The 2903 was a VERY nice bit slice chip, it could do single-cycle > multiply > > and divide, as it had an extra shift register for the multiplier bits. > > ...and you can expand the Registers externally with AM29705 (AM29707) > > > The > > 29203 is pin compatible, but faster. Once I got the whole system > running, I > > planned to upgrade to the 29203. I had planned to make device controllers > > with 4 74S181s and a dual-port ram chip for registers, and the control > store > > would be 27C32 EPROMs of the fastest grade. I was hoping to get 4 MIPS > from > > these. > The 49C402 has an expanded Register set (64 words instead of 16), an double > set of ALU Commands. Don't know if it is the same as on the 2903/203. It > contains > the carry readahed circuity too and is 60% faster IDT says... > > The 27C32 would be the bottleneck. I've bought some used AM27C291 in the > past (and compatible Parts from Cypress and TI). > I've pesteres the german company Conitec to implement device support for > those for ther GALEP Devices. Send 10 chips to them and got a Mail later > that they would need more..they where noe all defective now... > The Read Support was added for the GALEP III and IV ..but I'm would'nt > pay additionally and finally build a prommer fort those differential > Eproms myself. I'ts working and no Chip hat to die for it... > > But even with those Eproms (25..55ns) it would be impractical to build > an control store for a single experimental device out of it. I've build > an control store out of old cache RAMs (8kx8). (A friend of mine collected > many of them for me..out of old 486 Mainboards) An Atmega16 with an 4Mbit > Atmel Dataflash could store the Microcode and load it in the WCS. > There are still some Pipeline Registers to solder in and finally to write > the Software for the AVR. ..it's laying around for years now. :-| > > This all was before I knew about IDT71502 WCS Chips that include serial > shift registers.. > We had an Company here in Germany that sold used chips from recycled pcbs > one..the new management endet this. But before it ended I've bought a > bunch of them, besides things like J11, Bus drivers AM29828 and much > other things for a very small amount of bucks. > (From the point I've told them that I wanted the chips to build something > out of > it and I'm not interrested to only look at nice gold ceramic Chips w/o > any scratches..it seems that they send me the best looking Ic's they > had.. :-) ) > > > > > Of course, now this could all be built on a few FPGAs, and get vastly > higher > > performance. > > That's the point where the fun ends..at least for me. Yes, I've done > some designs on Altera CPLDs (schematic entry only), bought a book about > Verilog and one about VHDL .. but spare time is low... > > I don't even want to build a "fast" computer ...nice if it's fast, but > it isn't necessary. > I'm sitting on a PC with an Ryzen 5-3600 and 64Gbyte RAM (no, no Flash > disk, but a RAID arry of fast SAS "spinning rust" disks..) > > > > Yes, a small peripheral controller would be a much more practical > project. > > > > Jon > > Exactly. > First is to get something running.. > > In the old AM29xx Docs (Donnamaye E. White) are even "controllers" > described that don't use any ALU at all, but an AM2910 only. > As long you don't have to shuffle some data, this will be sufficient.. > (Coffee machine?) > > Regards, > Holm > > -- > Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe, > Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 > info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 > > --===============0412476380292570038==-- From glen.slick@gmail.com Thu Mar 13 20:00:41 2025 From: Glen Slick To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 13:00:22 -0700 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============5485667078089608323==" --===============5485667078089608323== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Thu, Mar 13, 2025, 12:37=E2=80=AFPM Mike Stein via cctalk wrote: > ISTR that some time ago I read mention here about an EPROM fast enough to > approach PROM speeds; anyone share that recollection, or even have a > source/part no.? > How big and how fast? Cypress made some 15ns UV eraseable parts, for example CY7C245A-15WC http://www.bitsavers.org/components/cypress/_dataBooks/1995_Cypress_High-Perf= ormance_Data_Book.pdf Chapter 4 I have some CY7C291A-35WC parts I bought to upgrade the microcode of an HP 1000 A900 12201-60001 Sequencer Card. (Haven't gotten around to doing that yet). > --===============5485667078089608323==-- From bfranchuk@jetnet.ab.ca Thu Mar 13 20:35:14 2025 From: ben To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 14:35:01 -0600 Message-ID: <7edcbd2b-7ed4-47e3-a47e-ed43921b2b77@jetnet.ab.ca> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============5409322542468700881==" --===============5409322542468700881== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On 2025-03-13 1:36 p.m., Paul Koning via cctalk wrote: > Depends on which one. RTL was 3.6 volts positive, as far as I can remember= . I actually have a keyboard that has some of those devices in it. Yes, ECL= is around 3 volts also but negative supply. And of course some people desig= ned systems with positive supplies but "negative" logic, in the sense that ~0= volts is logic 1 while near-VCC is logic 0; the CDC 6000 series machines are= an example. I was thinking of the PDP-8 there. 0 Volts logic 1 -3 volts logic 0. > FPGAs come in amazing sizes if you have sufficient money. I hope some day = to cram an entire CDC 6600 into an FPGA. The main problem with this isn't FP= GA sizes (by today's standards, an upper-midrange FPGA can do the job, memory= included) but rather the creation of an accurate model given the bizarre and= hairy timing of that machine. I have a gate level model, but it doesn't wor= k yet because of those issues. What would the purpose of said computer be? Might be better off with a clean 64 bit design and 16 bit bitslices. > paul >=20 --===============5409322542468700881==-- From mjd.bishop@emeritus-solutions.com Thu Mar 13 21:32:13 2025 From: Martin Bishop To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 21:32:07 +0000 Message-ID: <33736f533f7c48d7bdbf4c918e731029@emeritus-solutions.com> In-Reply-To: <5be791b5-c661-4900-b991-003cbdd3ac3a@jetnet.ab.ca> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8490064554974961345==" --===============8490064554974961345== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable If you are doing "industrial" IO the first thing you need is galvanic isolati= on, the second is usually sone of Ethernet, Can bus and 24V bit IO. The 24V = IO can be done with optos and (LED) constant current sources. There are 8 pi= n Can bus drivers with dual supplies and isolation. Plus, any (low) logic le= vel will act as an open drain output. If you wish 5v IO Microchip have some (new) SAMD derivatives eg PIC32CM1216CM= 00032 which feature 5v IO - and all its attendant troubles : high Vih, high V= oh, ... Judicious use of LV HCT with 5v tollerant inputs and the option of 5= v Vcc, or some other translation parts may be a preferable option. Only the low end FPGAs now have copious 3v3 IO, the bigger faster beasties ar= e 1v8 or below. And then there is LVDS etc etc. I can't see any reason that a common engine could not implement multiple arch= itectures, making it do all of them well would be a greater challenge, XFU ? = Dual ported BRAM is certainly the location for microcode, and many kilo byte= s of main memory ? Martin -----Original Message----- From: ben via cctalk [mailto:cctalk(a)classiccmp.org]=20 << snip >> They goofed on that, 3 volt transistor logic is negative. :) I really wonder = what is used in a Industrial Setting now days, HTL logic is long gone. << snip >> From when you could get a FPGA with 5 volt I/O and sane packaging and easy t= o use floor planning. What may be a valid option with a FPGA, is to design a computer with programm= able microcode into block ram. Then you could have PDP XYZ, IBM 360, A ALGOL machine,ect. Ben. --===============8490064554974961345==-- From elson@pico-systems.com Thu Mar 13 22:57:01 2025 From: Jon Elson To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 17:56:39 -0500 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1459617025784599212==" --===============1459617025784599212== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On 3/13/25 11:47, Holm Tiffe via cctalk wrote: > > ...and you can expand the Registers externally with AM29705 (AM29707) Actually, the 2903 didn't have any general registers at all. And, yes the 29705 provided dual-port registers for the 2903, that's what I used in my bit-slice CPU project. Jon --===============1459617025784599212==-- From elson@pico-systems.com Thu Mar 13 23:03:13 2025 From: Jon Elson To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 18:03:04 -0500 Message-ID: <937763e2-5f12-3416-9e92-00294def2070@pico-systems.com> In-Reply-To: <4da0055a-806d-442a-97b0-2bab781d3165@jetnet.ab.ca> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3868118759622668617==" --===============3868118759622668617== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On 3/13/25 13:09, ben via cctalk wrote: > On 2025-03-13 10:47 a.m., Holm Tiffe via cctalk wrote: > >>> Of course, now this could all be built on a few FPGAs, >>> and get vastly higher >>> performance. > Most designs seem to 8 bitter's, and all memory fits in > block ram. > Once you hit external ram/rom things slow down again. > >> >> That's the point where the fun ends..at least for me. >> Yes, I've done >> some designs on Altera CPLDs (schematic entry only), >> bought a book about >> Verilog and one about VHDL .. but spare time is low... >> >  ADHL is a nice way to program CPLD's and FPGA's. >  I tried using Altera fpga's, but routing never worked > reliable for me. >  Since every brand of FPGA is just a little different, I > never could port stuff using Verlog or VHDL. > WinCUPL is what I use to program CPLD's (Amtel) now. > I use Xilinx parts pretty exclusively.  Generally, pure VHDL files can be ported to their XC9500 or coolrunner II family of CPLDs, or their Spartan FPGAs with minimal issues.  If you use some of their design blocks then that ties you to a particular family. > > For building stuff, your choice of crystal oscillators is > really limited > so you are stuck with common speeds. Making it fast might > not be possible if your timing is off by a few nS and you > have to pick the next > slower sized oscillator. > The Xilinx FPGAs have a "clock manager" that allows you to configure PLL clock multiplication of whatever external clock you supply. Jon --===============3868118759622668617==-- From holm@freibergnet.de Thu Mar 13 23:18:11 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 14 Mar 2025 00:17:59 +0100 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6388270232608257673==" --===============6388270232608257673== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Jon Elson via cctalk wrote: > On 3/13/25 11:47, Holm Tiffe via cctalk wrote: > > > > ...and you can expand the Registers externally with AM29705 (AM29707) > > Actually, the 2903 didn't have any general registers at all. And, yes the > 29705 provided dual-port registers for the 2903, that's what I used in my > bit-slice CPU project. > > Jon > What's a general Register? Even the 2901 has an 16x4 register file, that's why this thing is called an RALU. ...and that register file is what one can expand with an 29705.. Regards, Holm -- Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe, Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============6388270232608257673==-- From paulkoning@comcast.net Thu Mar 13 23:56:53 2025 From: Paul Koning To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 19:56:36 -0400 Message-ID: In-Reply-To: <7edcbd2b-7ed4-47e3-a47e-ed43921b2b77@jetnet.ab.ca> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3041073828656652396==" --===============3041073828656652396== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable > On Mar 13, 2025, at 4:35=E2=80=AFPM, ben via cctalk wrote: >=20 > On 2025-03-13 1:36 p.m., Paul Koning via cctalk wrote: >=20 >> Depends on which one. RTL was 3.6 volts positive, as far as I can remembe= r. I actually have a keyboard that has some of those devices in it. Yes, EC= L is around 3 volts also but negative supply. And of course some people desi= gned systems with positive supplies but "negative" logic, in the sense that ~= 0 volts is logic 1 while near-VCC is logic 0; the CDC 6000 series machines ar= e an example. >=20 > I was thinking of the PDP-8 there. 0 Volts logic 1 -3 volts logic 0. >=20 >> FPGAs come in amazing sizes if you have sufficient money. I hope some day= to cram an entire CDC 6600 into an FPGA. The main problem with this isn't F= PGA sizes (by today's standards, an upper-midrange FPGA can do the job, memor= y included) but rather the creation of an accurate model given the bizarre an= d hairy timing of that machine. I have a gate level model, but it doesn't wo= rk yet because of those issues. >=20 > What would the purpose of said computer be? > Might be better off with a clean 64 bit design and 16 bit bitslices. To understand fully how the 6000 machines work, and to run code for those mac= hines more accurately than can be done on emulators. Also "because it can be= done" -- the same reason a lot of us do most of what we talk about on this l= ist. A while ago I used the VHDL model to understand a fairly well known but total= ly undocumented detail of debugging peripheral processor programs from memory= dumps (the only tool available if the program gets stuck or lost). That det= ail: a system reboot will drop a word of zero into each PP memory, usually at= the place its program pointer pointed at the time the boot reset happened. = The data flow through memory, the processor guts, and back to memory explains= why, but you have to look really closely at low level block diagram document= ation to see it. On the other hand, it appears quite plainly when you run th= e process on the VHDL model in a simulator. paul --===============3041073828656652396==-- From paulkoning@comcast.net Fri Mar 14 00:02:12 2025 From: Paul Koning To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 20:01:51 -0400 Message-ID: <755C021E-4A7E-4EC7-B5F6-152F1FFF98FC@comcast.net> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6473323032893934710==" --===============6473323032893934710== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable > On Mar 13, 2025, at 7:56=E2=80=AFPM, Paul Koning via cctalk wrote: >=20 >=20 >=20 >> On Mar 13, 2025, at 4:35=E2=80=AFPM, ben via cctalk wrote: >>=20 >> On 2025-03-13 1:36 p.m., Paul Koning via cctalk wrote: >>=20 >>> Depends on which one. RTL was 3.6 volts positive, as far as I can rememb= er. I actually have a keyboard that has some of those devices in it. Yes, E= CL is around 3 volts also but negative supply. And of course some people des= igned systems with positive supplies but "negative" logic, in the sense that = ~0 volts is logic 1 while near-VCC is logic 0; the CDC 6000 series machines a= re an example. >>=20 >> I was thinking of the PDP-8 there. 0 Volts logic 1 -3 volts logic 0. >>=20 >>> FPGAs come in amazing sizes if you have sufficient money. I hope some da= y to cram an entire CDC 6600 into an FPGA. The main problem with this isn't = FPGA sizes (by today's standards, an upper-midrange FPGA can do the job, memo= ry included) but rather the creation of an accurate model given the bizarre a= nd hairy timing of that machine. I have a gate level model, but it doesn't w= ork yet because of those issues. >>=20 >> What would the purpose of said computer be? >> Might be better off with a clean 64 bit design and 16 bit bitslices. >=20 > To understand fully how the 6000 machines work, ... An additional comment on that. To understand any field well, it is generally= helpful, and at times crucial, to have some knowledge of early work. I just= read a translation of some of the works of Galileo that makes that point in = so many words in the introduction. Similarly, while people don't build compi= lers today the way they did in 1960, it is still valuable to read how Dijkstr= a and Zonneveld wrote the first ALGOL-60 compiler and, along the way, had to = invent many of the compiler construction techniques that were later routinely= taught and used in university compiler construction courses. There's an out= standing analysis of that, in the Ph.D. thesis of Gauthier van den Hove. (It= 's not yet a published document; I think that has something to do with copyri= ght and publication practices at some universities, perhaps Dutch or European= conventions.) He subtitled his thesis "New insights from old programs". paul --===============6473323032893934710==-- From bfranchuk@jetnet.ab.ca Fri Mar 14 01:41:36 2025 From: ben To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Thu, 13 Mar 2025 19:41:27 -0600 Message-ID: In-Reply-To: <755C021E-4A7E-4EC7-B5F6-152F1FFF98FC@comcast.net> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1757284912023516244==" --===============1757284912023516244== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On 2025-03-13 6:01 p.m., Paul Koning via cctalk wrote: > An additional comment on that. To understand any field well, it is general= ly helpful, and at times crucial, to have some knowledge of early work. I ju= st read a translation of some of the works of Galileo that makes that point i= n so many words in the introduction. Similarly, while people don't build com= pilers today the way they did in 1960, it is still valuable to read how Dijks= tra and Zonneveld wrote the first ALGOL-60 compiler and, along the way, had t= o invent many of the compiler construction techniques that were later routine= ly taught and used in university compiler construction courses. There's an o= utstanding analysis of that, in the Ph.D. thesis of Gauthier van den Hove. (= It's not yet a published document; I think that has something to do with copy= right and publication practices at some universities, perhaps Dutch or Europe= an conventions.) He subtitled his thesis "New insights from old programs". Hardware really defined what one could do, and that is often glossed=20 over in modern texts. You had multi-pass compilers because you had so little real memory. Later when C and Pascal came out, they had ample memory to run,and less primitive i/o thus deemed better and=20 quicker. Would one have had different languages had {} and [] been=20 around at the time and a full 32K of core? Hard drives designed for more memory rather than having fast RPM so you can swap virtual memory=20 faster. You see 7 and 9 track drives with computers till the late 80's in movies and TV, yet very few books describe hardware interfacing. Byte addressing is needed for C in general,and that makes a big difference in computer languages and design. Data addressing went from records to byte streams marking a whole new style of computing. > paul Ben. --===============1757284912023516244==-- From mjd.bishop@emeritus-solutions.com Fri Mar 14 08:15:09 2025 From: Martin Bishop To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 14 Mar 2025 08:14:59 +0000 Message-ID: <66119a7629bb463b9370f96a852a3e61@emeritus-solutions.com> In-Reply-To: <755C021E-4A7E-4EC7-B5F6-152F1FFF98FC@comcast.net> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2536126970809510436==" --===============2536126970809510436== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Paul Prompted by your mention of this thesis a month ago - I went in search The entire thesis appears to be available in pdf=20 https://www.cwi.nl/en/news/new-insights-from-reconstructing-the-first-algol-6= 0-system/ https://ir.cwi.nl/pub/28427/ Martin -----Original Message----- From: Paul Koning via cctalk [mailto:cctalk(a)classiccmp.org]=20 Sent: 14 March 2025 00:02 To: cctalk(a)classiccmp.org Cc: Paul Koning Subject: [cctalk] Re: IDT 49C402BG84 Pinout? > On Mar 13, 2025, at 7:56=E2=80=AFPM, Paul Koning via cctalk wrote: >=20 >=20 >=20 >> On Mar 13, 2025, at 4:35=E2=80=AFPM, ben via cctalk wrote: >>=20 >> On 2025-03-13 1:36 p.m., Paul Koning via cctalk wrote: >>=20 >>> Depends on which one. RTL was 3.6 volts positive, as far as I can rememb= er. I actually have a keyboard that has some of those devices in it. Yes, E= CL is around 3 volts also but negative supply. And of course some people des= igned systems with positive supplies but "negative" logic, in the sense that = ~0 volts is logic 1 while near-VCC is logic 0; the CDC 6000 series machines a= re an example. >>=20 >> I was thinking of the PDP-8 there. 0 Volts logic 1 -3 volts logic 0. >>=20 >>> FPGAs come in amazing sizes if you have sufficient money. I hope some da= y to cram an entire CDC 6600 into an FPGA. The main problem with this isn't = FPGA sizes (by today's standards, an upper-midrange FPGA can do the job, memo= ry included) but rather the creation of an accurate model given the bizarre a= nd hairy timing of that machine. I have a gate level model, but it doesn't w= ork yet because of those issues. >>=20 >> What would the purpose of said computer be? >> Might be better off with a clean 64 bit design and 16 bit bitslices. >=20 > To understand fully how the 6000 machines work, ... An additional comment on that. To understand any field well, it is generally= helpful, and at times crucial, to have some knowledge of early work. I just= read a translation of some of the works of Galileo that makes that point in = so many words in the introduction. Similarly, while people don't build compi= lers today the way they did in 1960, it is still valuable to read how Dijkstr= a and Zonneveld wrote the first ALGOL-60 compiler and, along the way, had to = invent many of the compiler construction techniques that were later routinely= taught and used in university compiler construction courses. There's an out= standing analysis of that, in the Ph.D. thesis of Gauthier van den Hove. (It= 's not yet a published document; I think that has something to do with copyri= ght and publication practices at some universities, perhaps Dutch or European= conventions.) He subtitled his thesis "New insights from old programs". paul --===============2536126970809510436==-- From elson@pico-systems.com Fri Mar 14 16:30:46 2025 From: Jon Elson To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 14 Mar 2025 11:30:36 -0500 Message-ID: <11c881a4-6739-e681-5822-32217b7a9105@pico-systems.com> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2971253531364344942==" --===============2971253531364344942== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On 3/13/25 18:17, Holm Tiffe via cctalk wrote: > Jon Elson via cctalk wrote: > >> On 3/13/25 11:47, Holm Tiffe via cctalk wrote: >>> ...and you can expand the Registers externally with AM29705 (AM29707) >> Actually, the 2903 didn't have any general registers at all. And, yes the >> 29705 provided dual-port registers for the 2903, that's what I used in my >> bit-slice CPU project. >> >> Jon >> > What's a general Register? Even the 2901 has an 16x4 register file, > that's why this thing is called an RALU. > ...and that register file is what one can expand with an 29705.. Wow!  You leave a project abandoned for 40 years (yes, it has REALLY been that long!!) and you think you still know stuff!  But, it all fades! I totally forgot about the on-chip register file!  Thanks for correcting me. Jon --===============2971253531364344942==-- From paulkoning@comcast.net Fri Mar 14 17:46:48 2025 From: Paul Koning To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 14 Mar 2025 13:46:30 -0400 Message-ID: In-Reply-To: <66119a7629bb463b9370f96a852a3e61@emeritus-solutions.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8675660480097599085==" --===============8675660480097599085== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable > On Mar 14, 2025, at 4:14=E2=80=AFAM, Martin Bishop wrote: >=20 > Paul >=20 > Prompted by your mention of this thesis a month ago - I went in search >=20 > The entire thesis appears to be available in pdf=20 >=20 > https://www.cwi.nl/en/news/new-insights-from-reconstructing-the-first-algol= -60-system/ >=20 > https://ir.cwi.nl/pub/28427/ >=20 > Martin Yes, it does appear that way. Interesting, because the web page (first link)= says it's a partial copy. paul --===============8675660480097599085==-- From bfranchuk@jetnet.ab.ca Fri Mar 14 19:45:24 2025 From: ben To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 14 Mar 2025 13:30:11 -0600 Message-ID: In-Reply-To: <11c881a4-6739-e681-5822-32217b7a9105@pico-systems.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7048686233771612817==" --===============7048686233771612817== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On 2025-03-14 10:30 a.m., Jon Elson via cctalk wrote: > > Wow!  You leave a project abandoned for 40 years (yes, it has REALLY > been that long!!) and you think you still know stuff!  But, it all fades! I have been planning to build a computer from about 1973, with Star Trek as my only computer model. Finally 50 years later I have one that works. Most of it finished now because of low cost PCB's off the internet. Getting a working mother board is harder than it looks. > I totally forgot about the on-chip register file!  Thanks for correcting > me. Thinks, I still need more blinking lights on the front panel. Star Trek's computer displays always had interesting patterns. > Jon > After reading the ALGOL 60 paper, why did I go 18 bits, I could have had 27 bits or a V8. :) I have 9 bit alu bit slices. The Electrologica X1, had the upper block of core memory as ROM for fixed system programs use. I am doing the same for my computer. Did any other computers have the same concept before the 1977? Ben. --===============7048686233771612817==-- From paulkoning@comcast.net Fri Mar 14 20:18:52 2025 From: Paul Koning To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 14 Mar 2025 16:18:32 -0400 Message-ID: <66AD4188-D619-4E43-B1C7-6727A829D281@comcast.net> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6352069349879094002==" --===============6352069349879094002== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable > On Mar 14, 2025, at 3:30=E2=80=AFPM, ben via cctalk wrote: >=20 > The Electrologica X1, had the upper block of core memory as ROM for > fixed system programs use. I am doing the same for my computer. >=20 > Did any other computers have the same concept before the 1977? > Ben. Definitely. I think the X1 got it from earlier research machines at CWI, whe= re some of the main memory drum tracks were set aside for fixed code. Note that the ROM core is not simply core memory set aside as ROM; it is actu= al read-only memory built very differently than read/write core memory. It i= s similar to the "core rope" ROM memory used in the Apollo space craft comput= ers, but the details are different and the X1 design is faster and more effic= ient. More precisely, the access time is reduced, and it can share significa= nt portions of the memory electronics with the read/write memory. I like to refer to the X1 ROM (called "dead memory" in the documentation) as = the world's first BIOS. That's because, like IBM PC BIOS, it contains I/O su= pport routines intended to make application I/O a lot easier. E.W. Dijkstra = designed this and wrote his Ph.D. thesis about it (and how it serves as a way= to manage the design complexity of dealing with interrupts, which was a bran= d-new problem then). A very different example of a separate block of memory appears in the "emulat= or" option in the IBM 360 model 44. By default that machine does not have th= e string and decimal arithmetic instructions, but the emulator option adds a = block of memory used by an emulation mode, so you can run standard 360 progra= ms and have the missing instructions emulated. It's somewhat like what micro= VAX did years later, except that the memory used is separate from regular mai= n memory and not visible to either applications or the OS. There's a separat= e boot process to load that memory (implemented entirely in a channel program= that fits on one card!) paul --===============6352069349879094002==-- From holm@freibergnet.de Fri Mar 14 21:16:50 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 14 Mar 2025 22:16:42 +0100 Message-ID: In-Reply-To: <11c881a4-6739-e681-5822-32217b7a9105@pico-systems.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8613703685889887670==" --===============8613703685889887670== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Jon Elson via cctalk wrote: > On 3/13/25 18:17, Holm Tiffe via cctalk wrote: > > Jon Elson via cctalk wrote: > >=20 > > > On 3/13/25 11:47, Holm Tiffe via cctalk wrote: > > > > ...and you can expand the Registers externally with AM29705 (AM29707) > > > Actually, the 2903 didn't have any general registers at all. And, yes t= he > > > 29705 provided dual-port registers for the 2903, that's what I used in = my > > > bit-slice CPU project. > > >=20 > > > Jon > > >=20 > > What's a general Register? Even the 2901 has an 16x4 register file, > > that's why this thing is called an RALU. > > ...and that register file is what one can expand with an 29705.. >=20 > Wow!=C2=A0 You leave a project abandoned for 40 years (yes, it has REALLY b= een > that long!!) and you think you still know stuff!=C2=A0 But, it all fades! >=20 > I totally forgot about the on-chip register file!=C2=A0 Thanks for correcti= ng me. >=20 > Jon :-) Jon I don't think that there is a cause for thanking me for somewhat..we all getting older and the memory fades all the time. Regards, Holm --=20 Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,=20 Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============8613703685889887670==-- From bfranchuk@jetnet.ab.ca Fri Mar 14 22:27:24 2025 From: ben To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 14 Mar 2025 16:27:18 -0600 Message-ID: <5b00576f-413e-480a-948b-eeeed45b3463@jetnet.ab.ca> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============4420686253425284398==" --===============4420686253425284398== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On 2025-03-14 3:16 p.m., Holm Tiffe via cctalk wrote: > > :-) > Jon I don't think that there is a cause for thanking me for somewhat..we > all getting older and the memory fades all the time. > I don't think it fades, just slower access time. > Regards, > Holm > You can learn it all again In one's second childhood:) --===============4420686253425284398==-- From holm@freibergnet.de Fri Mar 14 23:15:08 2025 From: Holm Tiffe To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Sat, 15 Mar 2025 00:14:59 +0100 Message-ID: In-Reply-To: <4da0055a-806d-442a-97b0-2bab781d3165@jetnet.ab.ca> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0690370791543170935==" --===============0690370791543170935== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable ben via cctalk wrote: > On 2025-03-13 10:47 a.m., Holm Tiffe via cctalk wrote: >=20 > > > Of course, now this could all be built on a few FPGAs, and get vastly h= igher > > > performance. > Most designs seem to 8 bitter's, and all memory fits in block ram. > Once you hit external ram/rom things slow down again. >=20 > >=20 > > That's the point where the fun ends..at least for me. Yes, I've done > > some designs on Altera CPLDs (schematic entry only), bought a book about > > Verilog and one about VHDL .. but spare time is low... > >=20 > ADHL is a nice way to program CPLD's and FPGA's. > I tried using Altera fpga's, but routing never worked reliable for me. > Since every brand of FPGA is just a little different, I never could port > stuff using Verlog or VHDL. > WinCUPL is what I use to program CPLD's (Amtel) now. >=20 > > I don't even want to build a "fast" computer ...nice if it's fast, but > > it isn't necessary. > > I'm sitting on a PC with an Ryzen 5-3600 and 64Gbyte RAM (no, no Flash > > disk, but a RAID arry of fast SAS "spinning rust" disks..) >=20 > For building stuff, your choice of crystal oscillators is really limited > so you are stuck with common speeds. Making it fast might not be possible if > your timing is off by a few nS and you have to pick the next > slower sized oscillator. >=20 >=20 > > >=20 > > > Yes, a small peripheral controller would be a much more practical proje= ct. > > >=20 > > > Jon >=20 > I keep thinking of a old 7 track mag tape drive replacement, > with fake spinning reels and compact flash card hidden inside. > 9 track would have wi-fi to the cloud. >=20 > > Exactly. > > First is to get something running.. > >=20 > > In the old AM29xx Docs (Donnamaye E. White) are even "controllers" > > described that don't use any ALU at all, but an AM2910 only. > > As long you don't have to shuffle some data, this will be sufficient.. > > (Coffee machine?) >=20 > Come on, use a PI for the coffee machine, it has to be connected to the > net so the world knows when the brew is done. :) >=20 > > Regards, > > Holm > >=20 > Ben. >=20 >=20 Ben what's your intention for participating ont this list? Regards, Holm --=20 Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,=20 Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583 info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741 --===============0690370791543170935==-- From mhs.stein@gmail.com Fri Mar 14 23:49:15 2025 From: Mike Stein To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 14 Mar 2025 19:48:56 -0400 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8853433223197525556==" --===============8853433223197525556== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Looks perfect for replacing some hard-to-find TTL PROMs; Thank you!!! On Thu, Mar 13, 2025 at 4:00=E2=80=AFPM Glen Slick via cctalk wrote: > On Thu, Mar 13, 2025, 12:37=E2=80=AFPM Mike Stein via cctalk < > cctalk(a)classiccmp.org> > wrote: > > > ISTR that some time ago I read mention here about an EPROM fast enough to > > approach PROM speeds; anyone share that recollection, or even have a > > source/part no.? > > > > How big and how fast? Cypress made some 15ns UV eraseable parts, for > example CY7C245A-15WC > > > http://www.bitsavers.org/components/cypress/_dataBooks/1995_Cypress_High-Pe= rformance_Data_Book.pdf > Chapter 4 > > I have some CY7C291A-35WC parts I bought to upgrade the microcode of an HP > 1000 A900 12201-60001 Sequencer Card. (Haven't gotten around to doing that > yet). > > > > --===============8853433223197525556==-- From cisin@xenosoft.com Fri Mar 14 23:49:58 2025 From: Fred Cisin To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Fri, 14 Mar 2025 16:49:54 -0700 Message-ID: In-Reply-To: <5b00576f-413e-480a-948b-eeeed45b3463@jetnet.ab.ca> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============5216122171608831488==" --===============5216122171608831488== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit >> :-) >> Jon I don't think that there is a cause for thanking me for somewhat..we >> all getting older and the memory fades all the time. >> > I don't think it fades, just slower access time. un-refreshed dynamic RAM, particularly wetware, fades, slows down, and has more errors, including loss of access to some bits --===============5216122171608831488==-- From silvercreekvalley@yahoo.com Sun Mar 16 13:55:46 2025 From: silcreval To: cctalk@classiccmp.org Subject: [cctalk] Indius Java components Date: Sun, 16 Mar 2025 13:55:24 +0000 Message-ID: <0E776409-5490-4817-B590-EBF009E7A5A4@yahoo.com> In-Reply-To: <0E776409-5490-4817-B590-EBF009E7A5A4.ref@yahoo.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1289308802095984390==" --===============1289308802095984390== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable A very left field question, but many moons ago I wrote some software using Ne= scape IFC. For those with long memories that was an early GUI library for Jav= a that predates Swing. For no reason at all I'd like to get this software running again, but noticed= that I probably need a 3rd party library that was produced by Indius. These = IFC add ons provided a fantastic grid and tree component. The software was I believe finally released with a GNU license in the 00s but= despite searching on archive etc I've not been able to find it. Does anyone by any chance have an archived copy ? Netscape IFC was quite a big thing when it was released by the way, and many = books were written about it. It was also bundled with Netscapes browsers in t= he day, so available wherever they were installed. I believe the team that created IFC went on to make Swing, which is in many w= ays similar, but added a lot of bulk which at least in the early 00s made thi= ngs slow. Thanks Ian --===============1289308802095984390==-- From cc@informatik.uni-stuttgart.de Mon Mar 17 08:07:20 2025 From: Christian Corti To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Mon, 17 Mar 2025 09:07:09 +0100 Message-ID: <46e266b4-8cbc-8998-ddd5-8e337cad675f@informatik.uni-stuttgart.de> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1845729915251886774==" --===============1845729915251886774== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On Thu, 13 Mar 2025, Paul Koning wrote: > it. Yes, ECL is around 3 volts also but negative supply. And of course ECL uses -5,5V supply. Logic levels ca. -0.75V and -1.5V Christian --===============1845729915251886774==-- From elson@pico-systems.com Mon Mar 17 15:01:19 2025 From: Jon Elson To: cctalk@classiccmp.org Subject: [cctalk] Re: IDT 49C402BG84 Pinout? Date: Mon, 17 Mar 2025 10:01:12 -0500 Message-ID: <3cbc2ce1-2c21-55da-7f95-70102bf59e2a@pico-systems.com> In-Reply-To: <46e266b4-8cbc-8998-ddd5-8e337cad675f@informatik.uni-stuttgart.de> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6397128903050880394==" --===============6397128903050880394== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On 3/17/25 03:07, Christian Corti via cctalk wrote: > On Thu, 13 Mar 2025, Paul Koning wrote: >> it.  Yes, ECL is around 3 volts also but negative >> supply.  And of course > > ECL uses -5,5V supply. Logic levels ca. -0.75V and -1.5V Motorola MECL 10 K : supply -5.2 V and logic levels -1.6V and -0.8V MECL 100K supply -4.5 V and logic is the same. IBM's version that they called MST4 used power supplies of +1.25 V and -3.0 V and logic levels were -400mV and +400 mV.  The advantage of this was they could terminate lines at ground potential, which made hooking a scope to the end of a transmission line super easy. Jon --===============6397128903050880394==-- From lproven@gmail.com Mon Mar 17 15:04:26 2025 From: Liam Proven To: cctalk@classiccmp.org Subject: [cctalk] Re: Indius Java components Date: Mon, 17 Mar 2025 15:04:09 +0000 Message-ID: In-Reply-To: <0E776409-5490-4817-B590-EBF009E7A5A4@yahoo.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============9212298163179226961==" --===============9212298163179226961== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Sun, 16 Mar 2025 at 14:06, silcreval via cctalk wrote: > > A very left field question, but many moons ago I wrote some software using = Nescape IFC. Do you mean this Netscape IFC? https://en.wikipedia.org/wiki/Internet_Foundation_Classes Note that there are download links there.. --=20 Liam Proven ~ Profile: https://about.me/liamproven Email: lproven(a)cix.co.uk ~ gMail/gTalk/FB: lproven(a)gmail.com Twitter/LinkedIn: lproven ~ Skype: liamproven IoM: (+44) 7624 227612: UK: (+44) 7939-087884 Czech [+ WhatsApp/Telegram/Signal]: (+420) 702-829-053 --===============9212298163179226961==-- From jeffrey@vcfed.org Tue Mar 18 16:58:13 2025 From: Jeffrey Brace To: cctalk@classiccmp.org Subject: [cctalk] VCF EAST CONSIGNMENT HAS A BIGGER SPACE! - April 4-6, 2025 - Wall, NJ Date: Tue, 18 Mar 2025 12:57:37 -0400 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0466250709484970607==" --===============0466250709484970607== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit VCF EAST 2025 CONSIGNMENT HAS A BIGGER SPACE! VCF now has a 7000 square foot space for consignment! Plenty of space for everyone's items and less waiting time to get in! Information about consignment is here: https://vcfed.org/events/vintage-computer-festival-east/vcf-east-consignment/ Register and enter your new items into consignment here: https://nexopos.vcfed.org/ The show is April 4-6 in Wall, NJ. More info here: https://vcfed.org/events/vintage-computer-festival-east/ Tickets here: https://vcfed.org/vcf-east-tickets/ Jeff Brace VCF East Showrunner --===============0466250709484970607==-- From jeffrey@vcfed.org Wed Mar 19 12:18:54 2025 From: Jeffrey Brace To: cctalk@classiccmp.org Subject: [cctalk] VCF West 2025 Survey - Final Days - Mountain View, California Date: Wed, 19 Mar 2025 08:18:33 -0400 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6440599136673026926==" --===============6440599136673026926== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit There are only 5 days left to fill out this survey! Help us make a great show for VCF West 2025, please fill out this survey: https://forms.gle/R1kSCsVqEyZfgQ4Q8 --===============6440599136673026926==-- From heck.joseph@aol.com Wed Mar 19 15:41:30 2025 From: Joe To: cctalk@classiccmp.org Subject: [cctalk] Selling Off My Q-Bus Collection Date: Wed, 19 Mar 2025 15:41:20 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============5321506011980201365==" --===============5321506011980201365== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Hi Everyone, I'm new to this list so please let me know if I am doing something incorrect. Anyway, I have a bunch of Qbus stuff (RXV21s, RX02s, memory boards, 11/23s, etc) and I am getting to the point in my life that it all needs to go to a new home. I would like to know if anybody has thoughts on where I should post the list or sell it. I could always do Epay, but I'm not sure that is the best place. I thought here or Vintage would be better but I'd like to hear thoughts from somebody that has already been there. thanks in advance Joe Heck --===============5321506011980201365==-- From henry.r.bent@gmail.com Wed Mar 19 15:52:48 2025 From: Henry Bent To: cctalk@classiccmp.org Subject: [cctalk] Re: Selling Off My Q-Bus Collection Date: Wed, 19 Mar 2025 11:52:32 -0400 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2978257304081006370==" --===============2978257304081006370== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On Wed, 19 Mar 2025 at 11:41, Joe via cctalk wrote: > Hi Everyone, > I'm new to this list so please let me know if I am doing something > incorrect. Anyway, I have a bunch of Qbus stuff (RXV21s, RX02s, memory > boards, 11/23s, etc) and I am getting to the point in my life that it > all needs to go to a new home. I would like to know if anybody has > thoughts on where I should post the list or sell it. I could always do > Epay, but I'm not sure that is the best place. I thought here or > Vintage would be better but I'd like to hear thoughts from somebody that > has already been there. > thanks in advance > Joe Heck This list is probably as good a place as anywhere. You might not get the sort of top dollar prices that you would get on that auction site, but you can be sure that your pieces will be going to a good home. If you can post your location that would also be helpful in order to find folks who are local and can pick up large/heavy items instead of having to worry about shipping them. -Henry --===============2978257304081006370==-- From heck.joseph@aol.com Wed Mar 19 16:44:53 2025 From: Joe To: cctalk@classiccmp.org Subject: [cctalk] Selling Off My Q-Bus Collection (revision based on suggestions) Date: Wed, 19 Mar 2025 16:44:44 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============4376373815358870508==" --===============4376373815358870508== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Hi, located in Eastern MA, I already have a couple of interests, but I'll see what comes in. Multiple q-bus boards that can easily ship, a VT103, a BA chassis 9x4 I think and two RX02 units. --===============4376373815358870508==-- From van.snyder@sbcglobal.net Wed Mar 19 17:46:36 2025 From: Van Snyder To: cctalk@classiccmp.org Subject: [cctalk] Need PATA drives? Date: Wed, 19 Mar 2025 10:46:20 -0700 Message-ID: <9c42d526efe01d3783aa342aa73c34b2126f99f1.camel@sbcglobal.net> In-Reply-To: <9c42d526efe01d3783aa342aa73c34b2126f99f1.camel.ref@sbcglobal.net> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3969490474645175672==" --===============3969490474645175672== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit I have some 3.5" PATA drives. One WD2500 250 GB drive and two Maxtor Max Line II 320 GB drives. All three passed SMART long tests. If you need any, they're yours for the price of a PDF shipping label. --===============3969490474645175672==-- From alex_w_king@yahoo.com Wed Mar 19 18:09:02 2025 From: Alex King To: cctalk@classiccmp.org Subject: [cctalk] Re: Selling Off My Q-Bus Collection (revision based on suggestions) Date: Wed, 19 Mar 2025 12:08:39 -0600 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1645258108910780872==" --===============1645258108910780872== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Hey Joe, can you tell me more about the VT103? Alex > On Mar 19, 2025, at 10:44=E2=80=AFAM, Joe via cctalk wrote: >=20 > =EF=BB=BFHi, located in Eastern MA, I already have a couple of interests,= but I'll see what comes in. Multiple q-bus boards that can easily ship, a = VT103, a BA chassis 9x4 I think and two RX02 units. --===============1645258108910780872==-- From mazzini_alessandro@hotmail.com Wed Mar 19 18:52:53 2025 From: Alessandro Mazzini To: cctalk@classiccmp.org Subject: [cctalk] Re: Need PATA drives? Date: Wed, 19 Mar 2025 18:52:45 +0000 Message-ID: In-Reply-To: <9c42d526efe01d3783aa342aa73c34b2126f99f1.camel@sbcglobal.net> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============5270051523089987494==" --===============5270051523089987494== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Hello, You should mention where you are ( country ), I think -----Original Message----- From: Van Snyder via cctalk =20 Sent: Wednesday, March 19, 2025 6:46 PM To: Joe via cctalk Cc: Van Snyder Subject: [cctalk] Need PATA drives? I have some 3.5" PATA drives. One WD2500 250 GB drive and two Maxtor Max Line= II 320 GB drives. All three passed SMART long tests. If you need any, they're yours for the price of a PDF shipping label. --===============5270051523089987494==-- From epekstrom@gmail.com Wed Mar 19 18:58:59 2025 From: Peter Ekstrom To: cctalk@classiccmp.org Subject: [cctalk] Re: Selling Off My Q-Bus Collection (revision based on suggestions) Date: Wed, 19 Mar 2025 14:58:44 -0400 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2146460464763820217==" --===============2146460464763820217== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Hi Joe, I have an 11/23-PLUS without a chassis so would that BA-chassis happen to be for a 23-PLUS? A BA-11S I believe it should be. -Peter On Wed, Mar 19, 2025 at 2:09=E2=80=AFPM Alex King via cctalk wrote: > > Hey Joe, can you tell me more about the VT103? > > Alex > > > > On Mar 19, 2025, at 10:44=E2=80=AFAM, Joe via cctalk > wrote: > > > > =EF=BB=BFHi, located in Eastern MA, I already have a couple of interest= s, but > I'll see what comes in. Multiple q-bus boards that can easily ship, a > VT103, a BA chassis 9x4 I think and two RX02 units. > > --===============2146460464763820217==-- From van.snyder@sbcglobal.net Wed Mar 19 19:23:59 2025 From: Van Snyder To: cctalk@classiccmp.org Subject: [cctalk] Re: Need PATA drives? Date: Wed, 19 Mar 2025 12:23:47 -0700 Message-ID: In-Reply-To: =?utf-8?q?=3COS6P279MB08913421F944EC9A5EB155FEECD92=40OS6P279MB?= =?utf-8?q?0891=2ENORP279=2EPROD=2EOUTLOOK=2ECOM=3E?= MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============5613298264870562768==" --===============5613298264870562768== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On Wed, 2025-03-19 at 18:52 +0000, Alessandro Mazzini via cctalk wrote: > Hello, > > You should mention where you are ( country ), I think Near Los Angeles > > -----Original Message----- > From: Van Snyder via cctalk > Sent: Wednesday, March 19, 2025 6:46 PM > To: Joe via cctalk > Cc: Van Snyder > Subject: [cctalk] Need PATA drives? > > I have some 3.5" PATA drives. One WD2500 250 GB drive and two Maxtor > Max Line II 320 GB drives. All three passed SMART long tests. > > If you need any, they're yours for the price of a PDF shipping label. > --===============5613298264870562768==-- From jeffrey@vcfed.org Thu Mar 20 12:06:59 2025 From: Jeffrey Brace To: cctalk@classiccmp.org Subject: [cctalk] Brian Kernighan @ VCF East April 5 at 5PM Date: Thu, 20 Mar 2025 08:06:39 -0400 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6641319890736086120==" --===============6641319890736086120== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Brian Kernighan will be interviewed by Stephen Edwards about his 2019 book: UNIX: A History and a Memoir. He will be there Saturday, April 5 at 5PM. Brian Kernighan worked at Bell Labs and co-wrote the first book on C Programming (in 1978) with Dennis Ritchie: "The C Programming Language" VCF East 2025 will be in Wall, NJ from April 4-6. More information: https://vcfed.org/events/vintage-computer-festival-east/ Tickets: https://vcfed.org/vcf-east-tickets/ Take care! Jeff Brace VCF East Showrunner --===============6641319890736086120==-- From jeffrey@vcfed.org Fri Mar 21 10:01:42 2025 From: Jeffrey Brace To: cctalk@classiccmp.org Subject: [cctalk] Food Truck at VCF East 2025 Date: Fri, 21 Mar 2025 06:00:00 -0400 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============5823243782445104926==" --===============5823243782445104926== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit VCF East has a food truck this year! Boardwalk Bites agreed to have a truck there. Besides the long lines at Consignment, on-campus food had the biggest complaints from last year's survey. We hope that this solves this problem. MENU: BREAKFAST (Served from 7:30 am) Pork, Egg and Cheese Roll Egg, Bacon and Cheese Burrito Bagels and Pastries Coffee & Tea LUNCH (Served from 11:30 am – 2:00 pm) Cheeseburger Sausage & Peppers Sandwich Vegetarian Sandwich Cheesesteak Seasoned Fries Fresh Fruit BEVERAGES Water, Soda Show info: https://vcfed.org/events/vintage-computer-festival-east/ Tickets: https://vcfed.org/vcf-east-tickets/ --===============5823243782445104926==-- From brain@jbrain.com Sat Mar 22 05:49:37 2025 From: Jim Brain To: cctalk@classiccmp.org Subject: [cctalk] FD-55B head loose Date: Sat, 22 Mar 2025 00:49:29 -0500 Message-ID: <4fd82e46-ead0-46ff-8344-acf40a95d068@jbrain.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7139599890361119042==" --===============7139599890361119042== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit I was wondering if anyone here has experience with the FD55-B with head load solenoid. I have a few working ones, but this one is not, and when I look at it, it differs from the others in that the head "wiggles" up and done on the side nearest the solenoid. I can see it is tight on the rail oppose the solenoid, but on the side nearest, the back of the head does not connect with the rail on the back (which seems correct, as there is a piece of that extends out and looks to slot into a sensor. But, I'd assume the front mount would hug the rail, but it only does on the top. By pushing the head close to the disk in use, I can get it to work, so I think this loose head issue is the only one. I guess: * Anyone seen something like this? * Is this a broken rail mount on the head, or something else? * If its broken and probably can't be fixed, anyone have a parts FD55-B? * Can one replace the head on these (it looks like you can, but I admit I have never changed parts in a drive mech. Jim -- Jim Brain brain(a)jbrain.com www.jbrain.com --===============7139599890361119042==-- From ard.p850ug1@gmail.com Sat Mar 22 11:23:44 2025 From: Tony Duell To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sat, 22 Mar 2025 11:23:26 +0000 Message-ID: In-Reply-To: <4fd82e46-ead0-46ff-8344-acf40a95d068@jbrain.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============9193265834447441794==" --===============9193265834447441794== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On Sat, Mar 22, 2025 at 5:49 AM Jim Brain via cctalk wrote: > > I was wondering if anyone here has experience with the FD55-B with head > load solenoid. There are many different series of Teac FD55s with differences between them. I've worked on several (meaning I've stripped and rebuilt them at a lower level than the service manuals suggest). Whether it has a head load solenoid or not makes little difference. The head carriage is unchanged. > > I have a few working ones, but this one is not, and when I look at it, > it differs from the others in that the head "wiggles" up and done on the > side nearest the solenoid. The side of the carriage nearest the stepper motor/tension band positioner has a pair of metal bearing bushes that run on that rail. The other side, nearest the load solenoid, has a pair of plastic tabs, one above and one below the rail. My guess is that one of the tabs has broken off in your drive. > * Anyone seen something like this? > > * Is this a broken rail mount on the head, or something else? I think so. > > * If its broken and probably can't be fixed, anyone have a parts FD55-B? I don't have any spares for these drives. As I said earlier you need to know the complete model number to get the right drive to take parts from. It does have to be a -B (double head, 48tpi). The -A is single-head, the -E (very rare!) and -F are the single and double head 96tpi versions, so the head is designed for a narrower track. > > * Can one replace the head on these (it looks like you can, but I admit > I have never changed parts in a drive mech. Anything is possible apart from skiing through a revolving door :-) More seriously, I have taken head carriages out and put them back on Teac FD55s. It's a long job, a lot of other parts have to come off first (PCB, top front chassis, spindle motor, head load solenoid, etc). Then you uncouple the tension band (exactly how depends on which drive series it is), take out the rails and lift out the head carriage Note that you replace the whole thing, trying to align the top head to the bottom head if you want to replace only one of them is supposed to be impossible in the field. It's not but it is not something to do 'for fun' Anyway, once you've got the new head in, you test it on a scratch disk, and then you have to do the radial head alignment etc, with a special CE disk. -tony --===============9193265834447441794==-- From ard.p850ug1@gmail.com Sat Mar 22 11:38:27 2025 From: Tony Duell To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sat, 22 Mar 2025 11:38:10 +0000 Message-ID: In-Reply-To: <4fd82e46-ead0-46ff-8344-acf40a95d068@jbrain.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0311426507328228353==" --===============0311426507328228353== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Incidentally there are some photos of FD55s in bits and being re-assembled in a couple of my flickr albums : https://www.flickr.com/photos/tony_duell/albums/72177720302114987/ https://www.flickr.com/photos/tony_duell/albums/72177720304931970/ They cover the complete computers (Stride 440 and Philips P2000C) so most of the photos are not of the drives, but there should be some that show the head positioner, etc And here's a home-made version of the positioner-moving tool. Not essential, but it's useful to have. -tony https://www.flickr.com/photos/tony_duell/albums/72177720302945215/ --===============0311426507328228353==-- From brain@jbrain.com Sat Mar 22 21:29:45 2025 From: Jim Brain To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sat, 22 Mar 2025 16:29:35 -0500 Message-ID: <7a173d0f-bfab-48a6-ae14-b231baf94a65@jbrain.com> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7055842991781064933==" --===============7055842991781064933== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On 3/22/2025 6:23 AM, Tony Duell wrote: > On Sat, Mar 22, 2025 at 5:49 AM Jim Brain via cctalk > wrote: >> I was wondering if anyone here has experience with the FD55-B with head >> load solenoid. > There are many different series of Teac FD55s with differences between > them. I've worked on several (meaning I've stripped and rebuilt them > at a lower level than the service manuals suggest). As noted, it's an FD-55B (double head, 48TPI), exact model number is FD-55B-01-U, part number is 19307110-01 > > Whether it has a head load solenoid or not makes little difference. > The head carriage is unchanged. I wasn't sure. > > The side of the carriage nearest the stepper motor/tension band > positioner has a pair of metal bearing bushes that run on that rail. > The other side, nearest the load solenoid, has a pair of plastic tabs, > one above and one below the rail. My guess is that one of the tabs has > broken off in your drive. That was my thought as well. > I don't have any spares for these drives. As I said earlier you need > to know the complete model number to get the right drive to take parts > from. Bummer, I know it needed to be a -B, but I was hoping I could rob a part off a BV or something later, as they are easier to find. >> * Can one replace the head on these (it looks like you can, but I admit >> I have never changed parts in a drive mech. > Anything is possible apart from skiing through a revolving door :-) I was pretty sure, given how many screws there are, that the answer was yes.  I probably should have asked a followup question, questioning whether it's worth trying to do the fix (without parts, the question is academic). It's not like the drive is especially rare, though they are commanding premium prices now (Dave Dunfield graciously sold me a few over a decade ago at reasonable prices, and they are still running strong), and I suspect they will only get pricier as time marches on. > > More seriously, I have taken head carriages out and put them back on > Teac FD55s. It's a long job, a lot of other parts have to come off > first (PCB, top front chassis, spindle motor, head load solenoid, > etc). Then you uncouple the tension band (exactly how depends on which > drive series it is), take out the rails and lift out the head carriage > Note that you replace the whole thing, trying to align the top head to > the bottom head if you want to replace only one of them is supposed to > be impossible in the field. It's not but it is not something to do > 'for fun' Yeah, I figured it was a head unit or nothing swap. > > Anyway, once you've got the new head in, you test it on a scratch > disk, and then you have to do the radial head alignment etc, with a > special CE disk. Well, before I make too many plans, is anyone in need of other parts from a drive like this?  I assume the head and electronics go first, but just checking. Otherwise, if it seems practical to fix the unit, I'll stow in the "waiting for parts to fix" box. > > -tony -- Jim Brain brain(a)jbrain.com www.jbrain.com --===============7055842991781064933==-- From brain@jbrain.com Sat Mar 22 21:31:24 2025 From: Jim Brain To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sat, 22 Mar 2025 16:31:15 -0500 Message-ID: <87de8c2d-b265-4ee5-b92d-4a3c08cd86d1@jbrain.com> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7542418067951014835==" --===============7542418067951014835== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On 3/22/2025 6:38 AM, Tony Duell wrote: > > And here's a home-made version of the positioner-moving tool. Not > essential, but it's useful to have. > > -tony > > > https://www.flickr.com/photos/tony_duell/albums/72177720302945215/ That's impressive, was not aware. Jim -- Jim Brain brain(a)jbrain.com www.jbrain.com --===============7542418067951014835==-- From cctalk@ibm51xx.net Sun Mar 23 18:33:31 2025 From: Ali To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sun, 23 Mar 2025 11:28:27 -0700 Message-ID: <06b401db9c21$5f9c6360$1ed52a20$@net> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1194140265023566990==" --===============1194140265023566990== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable > https://www.flickr.com/photos/tony_duell/albums/72177720302945215/ Tony, That=E2=80=99s pretty clever. So basically you have attached a M3 bolt to a h= andle/knob? -Ali --===============1194140265023566990==-- From cctalk@ibm51xx.net Sun Mar 23 18:35:22 2025 From: Ali To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sun, 23 Mar 2025 11:30:19 -0700 Message-ID: <06b501db9c21$a21d61d0$e6582570$@net> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2310118917210156863==" --===============2310118917210156863== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable > I don't have any spares for these drives. As I said earlier you need > to know the complete model number to get the right drive to take parts > from. It does have to be a -B (double head, 48tpi). The -A is > single-head, the -E (very rare!) and -F are the single and double head > 96tpi versions, so the head is designed for a narrower track. What is so special/rare about the E? I have only seen the -B and -F variants = used in most machines. -Ali --===============2310118917210156863==-- From ard.p850ug1@gmail.com Sun Mar 23 18:40:20 2025 From: Tony Duell To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sun, 23 Mar 2025 18:40:07 +0000 Message-ID: In-Reply-To: <06b501db9c21$a21d61d0$e6582570$@net> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============4661060288057025912==" --===============4661060288057025912== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Sun, Mar 23, 2025 at 6:30=E2=80=AFPM Ali wrote: > > > I don't have any spares for these drives. As I said earlier you need > > to know the complete model number to get the right drive to take parts > > from. It does have to be a -B (double head, 48tpi). The -A is > > single-head, the -E (very rare!) and -F are the single and double head > > 96tpi versions, so the head is designed for a narrower track. > > What is so special/rare about the E? I have only seen the -B and -F variant= s used in most machines. A =3D 40 cylinder single head B =3D 40 cylinder double head E =3D 80 cylinder single head F =3D 80 cylnder double head. Very few machines used an 80 cylinder single head drive, and I suspect the -F wasn't much more expensive anyway. So the -E model is not at all common (I believe C and D were reserved for 77 cylinder (8"?) drives, G is 80 cylinder double head, high density (360RPM? -- 1.2MByte), and H is 80 cylinder double head high density (1.4MByte)) -tony --===============4661060288057025912==-- From ard.p850ug1@gmail.com Sun Mar 23 18:43:02 2025 From: Tony Duell To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sun, 23 Mar 2025 18:42:48 +0000 Message-ID: In-Reply-To: <06b401db9c21$5f9c6360$1ed52a20$@net> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0559246504381767065==" --===============0559246504381767065== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Sun, Mar 23, 2025 at 6:39=E2=80=AFPM Ali via cctalk wrote: > > > https://www.flickr.com/photos/tony_duell/albums/72177720302945215/ Yes. There was an official Teac tool like that shown in some of the service manuals, but no longer available I suspect [1]. The manual says that if it's not available to simply use an M3 screw and large washer (turn it with a screwdriver) but it's easier with the knob. [1] In any case making one was quicker and cheaper than playing telephone tag trying to get an official one. -tony > > Tony, > > That=E2=80=99s pretty clever. So basically you have attached a M3 bolt to a= handle/knob? > > -Ali > --===============0559246504381767065==-- From cisin@xenosoft.com Sun Mar 23 19:07:15 2025 From: Fred Cisin To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sun, 23 Mar 2025 12:07:09 -0700 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7661116791312299421==" --===============7661116791312299421== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On Sun, 23 Mar 2025, Tony Duell via cctalk wrote: > A = 40 cylinder single head > B = 40 cylinder double head > E = 80 cylinder single head > F = 80 cylnder double head. > > Very few machines used an 80 cylinder single head drive, and I suspect > the -F wasn't much more expensive anyway. So the -E model is not at > all common > > (I believe C and D were reserved for 77 cylinder (8"?) drives, G is 80 > cylinder double head, high density (360RPM? -- 1.2MByte), and H is 80 > cylinder double head high density (1.4MByte)) C and D might still have been intended for 5.25"; either they made some and they didn't sell well, or they were waiting to see if there would become a need. (in case Micropolis made a comeback, or Vector Graphics decided to make a luggable with half-height drives :-). Tandon made some somewhat rare Tm400-4M drives (not always marked with the M!). Note, that some kids, who weren't around before Y2K, now call half-height drives, "Full height", and use "half-height" to refer to quarter-height or other slim drives. Were all of the FG (and even the G) dual speed, or did some rely on a controller supporting a 300K bps transfer? -- Grumpy Ol' Fred cisin(a)xenosoft.com --===============7661116791312299421==-- From ard.p850ug1@gmail.com Sun Mar 23 19:12:26 2025 From: Tony Duell To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sun, 23 Mar 2025 19:12:13 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============4442723519144826668==" --===============4442723519144826668== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On Sun, Mar 23, 2025 at 7:07 PM Fred Cisin via cctalk wrote: > Were all of the FG (and even the G) dual speed, or did some rely on a > controller supporting a 300K bps transfer? I thought GF meant it combined the capabilities of G and F drives and thus could handle 'normal' and 'high' density. Whether this means it just supports 2 write currents or also 2 speeds I am not sure. -tony --===============4442723519144826668==-- From cisin@xenosoft.com Sun Mar 23 19:21:14 2025 From: Fred Cisin To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sun, 23 Mar 2025 12:21:09 -0700 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2551765215344961916==" --===============2551765215344961916== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit >> Were all of the FG (and even the G) dual speed, or did some rely on a >> controller supporting a 300K bps transfer? On Sun, 23 Mar 2025, Tony Duell wrote: > I thought GF meant it combined the capabilities of G and F drives and > thus could handle 'normal' and 'high' density. Whether this means it > just supports 2 write currents or also 2 speeds I am not sure. and, THAT is a better wording of my question -- Grumpy Ol' Fred cisin(a)xenosoft.com --===============2551765215344961916==-- From tdk.knight@gmail.com Sun Mar 23 21:50:52 2025 From: Adrian Stoness To: cctalk@classiccmp.org Subject: [cctalk] Westhead acosiates Date: Sun, 23 Mar 2025 16:50:35 -0500 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1740103112777921367==" --===============1740103112777921367== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Curious if there's anything in the community on them They made a cpm based system that was used in HMI control room settings in the 80's I've got the manuals for their pdm 800 series along with backup of the software on 8in floppy from the mclelan mine in Lynn lake mb. Love to find a system the one that went with my stuff got bulldozed into the ground in 2009 --===============1740103112777921367==-- From cclist@sydex.com Sun Mar 23 22:45:24 2025 From: Chuck Guzis To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Sun, 23 Mar 2025 22:45:14 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7053341196037812869==" --===============7053341196037812869== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On 3/23/25 12:07, Fred Cisin via cctalk wrote: > Were all of the FG (and even the G) dual speed, or did some rely on a > controller supporting a 300K bps transfer? AFAIK, all 55FGs at a minimum had pads or zero-ohm resistors that could be manipulated to provide a 300 RPM spindle speed. Even the 3.5" FD235HGs were so equipped. --Chuck --===============7053341196037812869==-- From wayne.sudol@hotmail.com Sun Mar 23 23:59:50 2025 From: Wayne S To: cctalk@classiccmp.org Subject: [cctalk] Re: Westhead acosiates Date: Sun, 23 Mar 2025 23:59:42 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1316964888928483957==" --===============1316964888928483957== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable I assume =E2=80=9CDPM=E2=80=9D is Drive Positioning Module=E2=80=9D? Sent from my iPhone > On Mar 23, 2025, at 14:50, Adrian Stoness via cctalk wrote: >=20 > =EF=BB=BFCurious if there's anything in the community on them >=20 > They made a cpm based system that was used in HMI control room settings in > the 80's I've got the manuals for their pdm 800 series along with backup of > the software on 8in floppy from the mclelan mine in Lynn lake mb. Love to > find a system the one that went with my stuff got bulldozed into the ground > in 2009 --===============1316964888928483957==-- From tdk.knight@gmail.com Mon Mar 24 00:02:20 2025 From: Adrian Stoness To: cctalk@classiccmp.org Subject: [cctalk] Re: Westhead acosiates Date: Sun, 23 Mar 2025 19:02:03 -0500 Message-ID: In-Reply-To: =?utf-8?q?=3CCO1PR08MB720860A4CB4CA73F7DB352F7E4A52=40CO1PR08MB?= =?utf-8?q?7208=2Enamprd08=2Eprod=2Eoutlook=2Ecom=3E?= MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7473248625454789712==" --===============7473248625454789712== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Dpm? On Sun, Mar 23, 2025, 6:59 PM Wayne S wrote: > I assume “DPM” is Drive Positioning Module”? > > > Sent from my iPhone > > > On Mar 23, 2025, at 14:50, Adrian Stoness via cctalk < > cctalk(a)classiccmp.org> wrote: > > > > Curious if there's anything in the community on them > > > > They made a cpm based system that was used in HMI control room settings > in > > the 80's I've got the manuals for their pdm 800 series along with backup > of > > the software on 8in floppy from the mclelan mine in Lynn lake mb. Love to > > find a system the one that went with my stuff got bulldozed into the > ground > > in 2009 > --===============7473248625454789712==-- From wayne.sudol@hotmail.com Mon Mar 24 00:39:10 2025 From: Wayne S To: cctalk@classiccmp.org Subject: [cctalk] Re: Westhead acosiates Date: Mon, 24 Mar 2025 00:39:02 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1519254981276833674==" --===============1519254981276833674== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Sorry. PDM as in PDM 800 series. Was just gonna say that,if so, it=E2=80=99s probably a one-off system that wa= s specified by the Mine Company and custom programmed by Westhead. Hardware is probably off the shelf pc with interfaces to Opto22 type controll= ers. Could also be Allen-Bradley or Siemens controllers too. Sent from my iPhone On Mar 23, 2025, at 17:02, Adrian Stoness wrote: =EF=BB=BF Dpm? On Sun, Mar 23, 2025, 6:59=E2=80=AFPM Wayne S > wrote: I assume =E2=80=9CDPM=E2=80=9D is Drive Positioning Module=E2=80=9D? Sent from my iPhone > On Mar 23, 2025, at 14:50, Adrian Stoness via cctalk > wrote: > > =EF=BB=BFCurious if there's anything in the community on them > > They made a cpm based system that was used in HMI control room settings in > the 80's I've got the manuals for their pdm 800 series along with backup of > the software on 8in floppy from the mclelan mine in Lynn lake mb. Love to > find a system the one that went with my stuff got bulldozed into the ground > in 2009 --===============1519254981276833674==-- From w9gb@icloud.com Mon Mar 24 20:52:26 2025 From: Gregory Beat To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Mon, 24 Mar 2025 15:43:26 -0500 Message-ID: <598082D1-7580-4342-92ED-232F0B3A57CA@icloud.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1962707995325445702==" --===============1962707995325445702== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Vogons Wiki has summary from Teac Manuals. TEAC FD-55 Series Floppy Drives http://www.vogonswiki.com/index.php/Teac_FD-55_series TEAC FD-55 Product Brochure (PDF, 6 pages), 1985 printing https://minuszerodegrees.net/manuals/TEAC/TEAC%20FD-55%20Series.pdf greg, w9gb --===============1962707995325445702==-- From w9gb@icloud.com Mon Mar 24 20:59:46 2025 From: Gregory Beat To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Mon, 24 Mar 2025 15:58:50 -0500 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3177135680226720543==" --===============3177135680226720543== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable TEAC FD-55F floppy drives https://retrocmp.de/fdd/teac/fd55f.htm The TEAC FD-55F never appeared in the world of IBM compatible computers. Why = is that? Because it was simply superfluous in the DOS world. The TEAC FD-55F is a double-sided 5.25 inch drive that can write 96 tracks pe= r inch (TPI) with 9 sectors per track. In other words, the capacity of a flop= py disk is 720 KByte.=20 There were Radio Shack and other computers (NCR, etc.) that used this format = (DSQD). This corresponds to the capacity of the standard 3.5-inch double-density (DD)= drive.=20 The 3.5-inch floppy disk format was supported since DOS version 3.2. Introduction of 3.5=E2=80=9D drives and disks by IBM (mid-1980s) was one reas= on why the 5.25 inch drives with 720 KByte storage did not find their way int= o the IBM world. =3D=3D Further in the above web link: =EF=BB=BFChanging a Teac FD-55GFR drive to a FD-55F drive ... or,=20 How do I get my drive to spin at 300 RPM instead of 360 RPM ? gb --===============3177135680226720543==-- From imp@bsdimp.com Mon Mar 24 21:32:24 2025 From: Warner Losh To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Mon, 24 Mar 2025 15:32:06 -0600 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7355424006151672246==" --===============7355424006151672246== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Mon, Mar 24, 2025, 2:59=E2=80=AFPM Gregory Beat via cctalk wrote: > TEAC FD-55F floppy drives > https://retrocmp.de/fdd/teac/fd55f.htm > > The TEAC FD-55F never appeared in the world of IBM compatible computers. > Why is that? Because it was simply superfluous in the DOS world. > > The TEAC FD-55F is a double-sided 5.25 inch drive that can write 96 tracks > per inch (TPI) with 9 sectors per track. In other words, the capacity of a > floppy disk is 720 KByte. > > There were Radio Shack and other computers (NCR, etc.) that used this > format (DSQD). > Thr DEC Rainbow too. I upgraded by RX50s to a pair of these. There are patches to 2.11 and 3.10b for 800k floppies. But it wasn't long after that that I got a 38MB hard disks and i went back to 400k floppies. The RX50s just had different padding between sectors so 10 would fit per track. All the other parameters were the same. If you didn't want to boot off the floppies, my IMPDRIVE package could read, write or format them. I pulled them out of storage during covid, but couldn't make them work reliably again. :(. Warner This corresponds to the capacity of the standard 3.5-inch double-density > (DD) drive. > > The 3.5-inch floppy disk format was supported since DOS version 3.2. > > Introduction of 3.5=E2=80=9D drives and disks by IBM (mid-1980s) was one re= ason > why the 5.25 inch drives with 720 KByte storage did not find their way into > the IBM world. > > =3D=3D > > Further in the above web link: > > =EF=BB=BFChanging a Teac FD-55GFR drive to a FD-55F drive ... or, > How do I get my drive to spin at 300 RPM instead of 360 RPM ? > > gb --===============7355424006151672246==-- From cclist@sydex.com Mon Mar 24 22:50:35 2025 From: Chuck Guzis To: cctalk@classiccmp.org Subject: [cctalk] Re: FD-55B head loose Date: Mon, 24 Mar 2025 22:31:02 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6537105658269990038==" --===============6537105658269990038== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On 3/24/25 13:58, Gregory Beat via cctalk wrote: > TEAC FD-55F floppy drives > https://retrocmp.de/fdd/teac/fd55f.htm >=20 > The TEAC FD-55F never appeared in the world of IBM compatible computers. Wh= y is that? Because it was simply superfluous in the DOS world. >=20 > The TEAC FD-55F is a double-sided 5.25 inch drive that can write 96 tracks = per inch (TPI) with 9 sectors per track. In other words, the capacity of a fl= oppy disk is 720 KByte.=20 If by the FD55F not being used in the world of PC compatibles, perhaps as to brand, but certainly not as to 96tpi double-density. The Sanyo MBC-500 series comes to mind with various diskette options. At Durango, the standard drive for Poppy was the Micropolis 1115-VI full-height 96 tpi drive. I used one on my 5160 running PC-DOS 2.0--use was mostly a matter of laying down a disk format--otherwise the drive functioned as a 720KB drive without system modification. There were other such systems in the PC-compatible world. It was viewed as a benefit in competition with IBMs 48 tpi drive choice. The 96 tpi drive was even common on several 8-bit CP/M systems. When the official support by IBM and Microsoft for 3.5" DD support, there was a difference in FAT and cluster size between IBM and Microsoft MS-DOS. It hardly made a difference with the DOS 2 first sector containing the DPB, but may have caused confusion in the PC-DOS 1.x world. --Chuck --===============6537105658269990038==-- From Martin.Hepperle@dlr.de Tue Mar 25 08:05:59 2025 From: Martin.Hepperle@dlr.de To: cctalk@classiccmp.org Subject: [cctalk] Pacific Data Systems - PDS 1020 Date: Tue, 25 Mar 2025 08:05:52 +0000 Message-ID: <5c3a85c8b7154a2d97ec7b4b3d7ad347@dlr.de> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1571468206845598555==" --===============1571468206845598555== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Many moons ago, I was working at a wind tunnel for aeronautic research. In the first week, when I started on my job, my future colleagues threw a lot= of outdated computer stuff into a large dumpster. Only many years later, after I became more aware of old computing technology,= I realized what that trash was. Duh! I recently dug through our library and loaned some reports describing the equ= ipment and the software at the time. Besides several HP 2116, ASR-33, Tektronix 40xx, x-y plotters and more, I als= o read about their first (pre HP) computer, which was used to control data ac= quisition and postprocessing. It was installed in 1966 and replaced by a HP 2116C in 1972. This was a Pacific Data Systems PDS 1020. It was built into a table and featu= red an IBM typewriter for printed output and a reader and a punch for paperta= pes. One report also contained the "listing" of the program, which is a 4-characte= r hexadecimal dump (with unusual hex digits).=20 To give you a "feeling" for the code, here is an example subroutine: 0256 L0LS 5001 0258 525S- L0LS M029 CS7D 2260 L0LA M029 CS7D 0260 L011 3002 L0C3- A26M- CS81 3S5A- 7262- 227C 0268 0000 4500 2000 0500- 3000- 4000- 5500- On bitsavers I found scans of some manuals with the instruction set and encod= ing. However, these lack complete programs. Therefore, I have scanned and re-typed= the original programs from my report in their original form. Now I am thinki= ng about writing a simple simulator to read and execute these programs. The PDS 1020 seems to have been a relatively low cost and hence successful co= mputer, but searching the internet I can find only two machines which seem to= be in museums. Maybe a few more have survived in personal collections. #1: https://www.computerhistory.org/collections/catalog/102686768=20 #2: https://collections.museumsvictoria.com.au/items/397741 Are there more? Are some of them in working order? Is there already a simulat= or available? Martin --===============1571468206845598555==-- From jeffrey@vcfed.org Wed Mar 26 17:13:03 2025 From: Jeffrey Brace To: cctalk@classiccmp.org Subject: [cctalk] Amiga Roundtables at VCF East April 5 & 6 - Wall, NJ Date: Wed, 26 Mar 2025 13:12:39 -0400 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6108896563453435275==" --===============6108896563453435275== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit VCF East 2025 is April 4-6. Amiga Roundtables at VCF East Moderated by Dave McMurtrie and Dan Wood. *Saturday roundtable* includes: RJ Mical Dale Luck Ron Nicholson Glenn Keller Andy Finkel Jeff Porter Randell Jesup Peter Cherna *Sunday Roundtable* includes: RJ Mical Dave Haynie David John Pleasance Robert Miranda Hedley Davis Jeff Bruette Don Gilbreath Tickets here: https://vcfed.org/2025/03/16/non-member-ticket-pricing-vcf-east/ Info here: https://vcfed.org/events/vintage-computer-festival-east/ --===============6108896563453435275==-- From cube1@charter.net Fri Mar 28 01:44:22 2025 From: Jay Jaeger To: cctalk@classiccmp.org Subject: [cctalk] IBM 1410 FPGA Implementation Update Date: Thu, 27 Mar 2025 20:37:06 -0500 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3240311552171489503==" --===============3240311552171489503== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit I have made some progress on my IBM 1410 FPGA implementation: - Communication between the FPGA and PC Support Program is now over UDP instead of USB/Serial - Tapes can now read/write reliably in non-overlapped mode - Diagnostics can be loaded and run from tape - Some tape issues still remain See https://www.computercollection.net/index.php/ibm-1410-fpga-implementation/ (especially the last three entries in the list.) JRJ --===============3240311552171489503==-- From jeffrey@vcfed.org Sat Mar 29 02:48:19 2025 From: Jeffrey Brace To: cctalk@classiccmp.org Subject: [cctalk] InversePhase @ VCF East - April 5 - Wall, NJ Date: Fri, 28 Mar 2025 22:47:50 -0400 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============4655606995810437428==" --===============4655606995810437428== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Want to know what a chiptune is? How about what a chiptune is not? You can learn a little bit about the technology, its history, how it makes sounds, how it is implemented, and the culture surrounding it at this panel. All ages and experience levels are welcome! And ... After his talk, make your own chiptunes! What’s the deal with all these 8-bit whipper-snappers and their beeps, boops, and farty bass?Want to know what a chiptune is? How about what a chiptune is not? You can learn a little bit about the technology, its history, how it makes sounds, how it is implemented, and the culture surrounding it at this panel. All ages and experience levels are welcome! @inversephase is a real human person (not a robot, as you might have heard) who writes game soundtracks and chiptune tributes for a living, runs Bloop Museum, eats pizza, and even occasionally writes Bios. INFO: https://vcfed.org/events/vintage-computer-festival-east/ TICKETS: https://vcfed.org/2025/03/16/non-member-ticket-pricing-vcf-east/ VCF East is April 4-6 2201 Marconi Road Wall, NJ 07719 --===============4655606995810437428==-- From shadoooo@gmail.com Sat Mar 29 17:34:01 2025 From: shadoooo To: cctalk@classiccmp.org Subject: [cctalk] DEC Unibus variants Date: Sat, 29 Mar 2025 18:33:54 +0100 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7720066087575318708==" --===============7720066087575318708== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Hello, I'm searching information about all existing variants of DEC Unibus in Dual/Quad/Hex flavors. I read the "UnibusSpec1979.pdf" on bitsavers, which reports a "Standard Unibus" pinout in the last pages. However in several backplanes "Small Peripheral Controller", "Modified Unibus Device" and "Extended Unibus" are supported. Maybe also other unlisted Unibus variants do exist (e.g VAX 11/730)? I also found the gunkies.org WIKI very helpful, however it is still quite difficult to compare the pinout differences (dummy proof). Where could I find a specific DEC documentation about the more recent variants, similar to the 1979 specs, but referred to SPC, MUD, EUB, ect? Big doubts: - why DEC, having defined the dual Standard pinout, had then to implement the quad SPC backplanes? - why DEC, having defined quad backplanes, had then to implement the hex (standard + SPC) or (MUD + SPC) or EUB? I mean: given that in AB all Unibus signals are present (from specifications), what is the need for CDEF? Provided that several signals are duplicated in hex pinout, the backplane will connect homologue signals together, or AB bus will always be separated from CDEF bus? My aim is to design a reprogrammable digital logic board which could be employed in any system, using 18bits address or also 22bits (i.e. for 11/24). Thanks Andrea --===============7720066087575318708==-- From milovelimirovic@gmail.com Sat Mar 29 20:06:35 2025 From: Milo =?utf-8?q?Velimirovi=C4=87?= To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sat, 29 Mar 2025 15:06:18 -0500 Message-ID: <65B2E7CE-D34B-40CA-AC22-6EA1A7A1C590@gmail.com> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7888303552017466008==" --===============7888303552017466008== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable > On Mar 29, 2025, at 12:33=E2=80=AFPM, shadoooo via cctalk wrote: >=20 > Hello, > I'm searching information about all existing variants of DEC Unibus in Dual= /Quad/Hex flavors. > I read the "UnibusSpec1979.pdf" on bitsavers, which reports a "Standard Uni= bus" pinout in the last pages. > However in several backplanes "Small Peripheral Controller", "Modified Unib= us Device" and "Extended Unibus" are supported. > Maybe also other unlisted Unibus variants do exist (e.g VAX 11/730)? > I also found the gunkies.org WIKI very helpful, however it is still quite d= ifficult to compare the pinout differences (dummy proof). Try this one: https://hampage.hu/dr/unibus.html >=20 > Where could I find a specific DEC documentation about the more recent varia= nts, similar to the 1979 specs, but referred to SPC, MUD, EUB, ect? >=20 > Big doubts: > - why DEC, having defined the dual Standard pinout, had then to implement t= he quad SPC backplanes? The =E2=80=9Cdual Standard pinout=E2=80=9D for slots A/B was generally used f= or a BC11-A Unibus cable, with a Unibus terminator in the very last slot. The Unibus cable carried sign= als (not power!) between backplanes. Quad SPC is common to (at least) Modified Unibus(MUD) and Standard Unibus. Th= e differences between the two backplane specs are in slots A/B only, with slots C-F the sam= e (AFAIK.) Also some slots of the of the VAX730 backplane. > - why DEC, having defined quad backplanes, had then to implement the hex (s= tandard + SPC) or (MUD + SPC) or EUB?=20 Probably due to changes in cabinets and packaging. The 11/20 was unique in ha= ving a quad backplane mounted from side to side in a BA-11 (and upside-down too!) Most of= the subsequent Unibus pdp11s had hex backplanes mounted either vertically, top to bottom, (1= 1/40, 11/45 and 11/70,) horizonatlly, front to back, (some 11/05s, 11/34, 11/35, 11/44 etc.),= another orientation was vertically to one side, front to back in 5.25=E2=80=9D cabine= ts. EUB was unique to the 11/24 and 11/44 and only for memory boards. [https://gunkies.org/wiki/Extended_UNIBUS] >=20 >=20 > I mean: given that in AB all Unibus signals are present (from specification= s), what is the need for CDEF? The ability to use larger printed circuit boards; it gets you higher density = and avoids the need to run (as many) interconnects off the board and thru the= backplane. Remember that 50-60 years ago was the era of 14,16-pin DIP packag= es for small-scale and medium-scale integration; larger packages existed of course, but they were the exception. = You still needed lots of wires to interconnect functionality between chip packages. Usi= ng a hex board instead of single or dual boards allowed many of those =E2=80=9Cwires= =E2=80=9D to be traces on a PCB, rather than run through the backplane or on = an over-the-top jumper. (See the 11/34a.) > Provided that several signals are duplicated in hex pinout, the backplane w= ill connect homologue signals together, > or AB bus will always be separated from CDEF bus? >=20 > My aim is to design a reprogrammable digital logic board which could be emp= loyed in any system, > using 18bits address or also 22bits (i.e. for 11/24). See the Unibone, to ensure you=E2=80=99re not reinventing the wheel. It also = includes a Unibus description that might be helpful. For something simpler ta= ke a look at the M1710 Unibus Interface Foundation Module. Brochure: https://= vt100.net/manx/details/1,22302 https://retrocmp.com/projects/unibone =E2=80=94Milo --===============7888303552017466008==-- From wayne.sudol@hotmail.com Sat Mar 29 20:11:40 2025 From: Wayne S To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sat, 29 Mar 2025 20:11:32 +0000 Message-ID: In-Reply-To: <65B2E7CE-D34B-40CA-AC22-6EA1A7A1C590@gmail.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2959965463167507158==" --===============2959965463167507158== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Nice bits of info =F0=9F=98=80 Sent from my iPhone > On Mar 29, 2025, at 13:06, Milo Velimirovi=C4=87 via cctalk wrote: >=20 > =EF=BB=BF >=20 >> On Mar 29, 2025, at 12:33=E2=80=AFPM, shadoooo via cctalk wrote: >>=20 >> Hello, >> I'm searching information about all existing variants of DEC Unibus in Dua= l/Quad/Hex flavors. >> I read the "UnibusSpec1979.pdf" on bitsavers, which reports a "Standard Un= ibus" pinout in the last pages. >> However in several backplanes "Small Peripheral Controller", "Modified Uni= bus Device" and "Extended Unibus" are supported. >> Maybe also other unlisted Unibus variants do exist (e.g VAX 11/730)? >> I also found the gunkies.org WIKI very helpful, however it is still quite = difficult to compare the pinout differences (dummy proof). >=20 > Try this one: > https://hampage.hu/dr/unibus.html >=20 >>=20 >> Where could I find a specific DEC documentation about the more recent vari= ants, similar to the 1979 specs, but referred to SPC, MUD, EUB, ect? >>=20 >> Big doubts: >> - why DEC, having defined the dual Standard pinout, had then to implement = the quad SPC backplanes? >=20 > The =E2=80=9Cdual Standard pinout=E2=80=9D for slots A/B was generally used= for a BC11-A Unibus cable, > with a Unibus terminator in the very last slot. The Unibus cable carried si= gnals (not power!) between backplanes. >=20 > Quad SPC is common to (at least) Modified Unibus(MUD) and Standard Unibus. = The differences > between the two backplane specs are in slots A/B only, with slots C-F the s= ame (AFAIK.) > Also some slots of the of the VAX730 backplane. >=20 >> - why DEC, having defined quad backplanes, had then to implement the hex (= standard + SPC) or (MUD + SPC) or EUB? >=20 > Probably due to changes in cabinets and packaging. The 11/20 was unique in = having a quad > backplane mounted from side to side in a BA-11 (and upside-down too!) Most = of the subsequent > Unibus pdp11s had hex backplanes mounted either vertically, top to bottom, = (11/40, 11/45 and > 11/70,) horizonatlly, front to back, (some 11/05s, 11/34, 11/35, 11/44 etc.= ), another > orientation was vertically to one side, front to back in 5.25=E2=80=9D cabi= nets. EUB was unique to > the 11/24 and 11/44 and only for memory boards. > [https://gunkies.org/wiki/Extended_UNIBUS] >>=20 >>=20 >> I mean: given that in AB all Unibus signals are present (from specificatio= ns), what is the need for CDEF? >=20 > The ability to use larger printed circuit boards; it gets you higher densit= y and avoids the need to run (as many) interconnects off the board and thru t= he backplane. Remember that 50-60 years ago was the era of 14,16-pin DIP pack= ages for small-scale and medium-scale > integration; larger packages existed of course, but they were the exception= . You still > needed lots of wires to interconnect functionality between chip packages. U= sing a hex > board instead of single or dual boards allowed many of those =E2=80=9Cwires= =E2=80=9D to be traces on a PCB, rather than run through the backplane or on = an over-the-top jumper. (See the 11/34a.) >=20 >> Provided that several signals are duplicated in hex pinout, the backplane = will connect homologue signals together, >> or AB bus will always be separated from CDEF bus? >>=20 >> My aim is to design a reprogrammable digital logic board which could be em= ployed in any system, >> using 18bits address or also 22bits (i.e. for 11/24). >=20 > See the Unibone, to ensure you=E2=80=99re not reinventing the wheel. It als= o includes a Unibus description that might be helpful. For something simpler = take a look at the M1710 Unibus Interface Foundation Module. Brochure: https:= //vt100.net/manx/details/1,22302 >=20 > https://retrocmp.com/projects/unibone >=20 > =E2=80=94Milo --===============2959965463167507158==-- From paulkoning@comcast.net Sat Mar 29 20:17:59 2025 From: Paul Koning To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sat, 29 Mar 2025 16:17:40 -0400 Message-ID: <40F62377-14CC-4319-9A86-D193516ECF0B@comcast.net> In-Reply-To: <65B2E7CE-D34B-40CA-AC22-6EA1A7A1C590@gmail.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3648948364757312066==" --===============3648948364757312066== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable > On Mar 29, 2025, at 4:06=E2=80=AFPM, Milo Velimirovi=C4=87 via cctalk wrote: >=20 > ... > The ability to use larger printed circuit boards; it gets you higher densit= y and avoids the need to run (as many) interconnects off the board and thru t= he backplane. Remember that 50-60 years ago was the era of 14,16-pin DIP pack= ages for small-scale and medium-scale > integration; larger packages existed of course, but they were the exception= . You still > needed lots of wires to interconnect functionality between chip packages. U= sing a hex > board instead of single or dual boards allowed many of those =E2=80=9Cwires= =E2=80=9D to be traces on a PCB, rather than run through the backplane or on = an over-the-top jumper. (See the 11/34a.) Also PCB technology. The early boards had lots of space between components. = I believe they were typically just two layers, with trace widths such that y= ou could not run a trace between DIP pins. Once you get traces between pins you can get a lot more density; 4 or more bo= ard layers is yet another major increment in possible density. Some of that = isn't workable without sufficiently fancy CAD tools. I don't know about DEC = in the PDP-11 era, but I remember doing my own PCB layout (for a university p= roject): two layers, done with red and green translucent adhesive tape on a l= ight table, in 2x scale. To make matters even stranger, the university board= shop could do two layers but not plated through holes. =20 Occasionally you'd see single layer boards in DEC products. I remember them = in the VT61, a crazy looking board with hundreds of jumper wires on it. Why = they didn't do it as a two-layer board I have no idea, I would assume it woul= d have been cheaper as well as more reliable. paul --===============3648948364757312066==-- From elson@pico-systems.com Sat Mar 29 22:07:46 2025 From: Jon Elson To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sat, 29 Mar 2025 17:07:39 -0500 Message-ID: <7400a636-4c72-dae4-f5cc-e77f13230c27@pico-systems.com> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3594225853975338047==" --===============3594225853975338047== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On 3/29/25 12:33, shadoooo via cctalk wrote: > Hello, > I'm searching information about all existing variants of > DEC Unibus in Dual/Quad/Hex flavors. > I read the "UnibusSpec1979.pdf" on bitsavers, which > reports a "Standard Unibus" pinout in the last pages. > However in several backplanes "Small Peripheral > Controller", "Modified Unibus Device" and "Extended > Unibus" are supported. > Maybe also other unlisted Unibus variants do exist (e.g > VAX 11/730)? > I also found the gunkies.org WIKI very helpful, however it > is still quite difficult to compare the pinout differences > (dummy proof). > > Where could I find a specific DEC documentation about the > more recent variants, similar to the 1979 specs, but > referred to SPC, MUD, EUB, ect? > > Big doubts: > - why DEC, having defined the dual Standard pinout, had > then to implement the quad SPC backplanes? > - why DEC, having defined quad backplanes, had then to > implement the hex (standard + SPC) or (MUD + SPC) or EUB? > I mean: given that in AB all Unibus signals are present > (from specifications), what is the need for CDEF? > Provided that several signals are duplicated in hex > pinout, the backplane will connect homologue signals > together, > or AB bus will always be separated from CDEF bus? > > My aim is to design a reprogrammable digital logic board > which could be employed in any system, > using 18bits address or also 22bits (i.e. for 11/24). In the "old" days, such as the 1970's, pretty much any DEC-manufactured peripheral was supplied as a bunch of cards that plugged into a specific backplane section, generally 9 slots, I think.  A couple double-wide slots were for the Unibus in and out connectors. Some time later, maybe in the early 80's, there were simpler controllers that fit on a single card, either quad-wide or hex-wide. Sorry for being so vague. Jon --===============3594225853975338047==-- From mjd.bishop@emeritus-solutions.com Sat Mar 29 23:29:24 2025 From: Martin Bishop To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sat, 29 Mar 2025 23:29:16 +0000 Message-ID: <82f4c14948c241ea810cee4820be2da5@emeritus-solutions.com> In-Reply-To: <65B2E7CE-D34B-40CA-AC22-6EA1A7A1C590@gmail.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8752961803396328817==" --===============8752961803396328817== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The why not use a UniBone comment has merit, what will your (FPGA) implementa= tion add ? If you have additional capability in prospect, there remains the matter of dr= ivers https://retrocmp.com/projects/qbone/326-qbone-unibone-alternative-bus-d= rivers If you solve the (near) unobtanium OC driver / receiver problem - I for one w= ill be all ears Martin -----Original Message----- From: Milo Velimirovi=C4=87 via cctalk [mailto:cctalk(a)classiccmp.org]=20 Sent: 29 March 2025 20:06 To: General Discussion: On-Topic and Off-Topic Posts Cc: shadoooo ; Milo Velimirovi=C4=87 Subject: [cctalk] Re: DEC Unibus variants > On Mar 29, 2025, at 12:33=E2=80=AFPM, shadoooo via cctalk wrote: >=20 > Hello, > I'm searching information about all existing variants of DEC Unibus in Dual= /Quad/Hex flavors. > I read the "UnibusSpec1979.pdf" on bitsavers, which reports a "Standard Uni= bus" pinout in the last pages. > However in several backplanes "Small Peripheral Controller", "Modified Unib= us Device" and "Extended Unibus" are supported. > Maybe also other unlisted Unibus variants do exist (e.g VAX 11/730)? > I also found the gunkies.org WIKI very helpful, however it is still quite d= ifficult to compare the pinout differences (dummy proof). Try this one: https://hampage.hu/dr/unibus.html >=20 > Where could I find a specific DEC documentation about the more recent varia= nts, similar to the 1979 specs, but referred to SPC, MUD, EUB, ect? >=20 > Big doubts: > - why DEC, having defined the dual Standard pinout, had then to implement t= he quad SPC backplanes? The =E2=80=9Cdual Standard pinout=E2=80=9D for slots A/B was generally used f= or a BC11-A Unibus cable, with a Unibus terminator in the very last slot. The= Unibus cable carried signals (not power!) between backplanes. Quad SPC is common to (at least) Modified Unibus(MUD) and Standard Unibus. Th= e differences between the two backplane specs are in slots A/B only, with slo= ts C-F the same (AFAIK.) Also some slots of the of the VAX730 backplane. > - why DEC, having defined quad backplanes, had then to implement the hex (s= tandard + SPC) or (MUD + SPC) or EUB?=20 Probably due to changes in cabinets and packaging. The 11/20 was unique in ha= ving a quad backplane mounted from side to side in a BA-11 (and upside-down t= oo!) Most of the subsequent Unibus pdp11s had hex backplanes mounted either v= ertically, top to bottom, (11/40, 11/45 and 11/70,) horizonatlly, front to back, (some 11/05s, 11/34, 11/35, 11/44 etc.),= another orientation was vertically to one side, front to back in 5.25=E2=80= =9D cabinets. EUB was unique to the 11/24 and 11/44 and only for memory board= s. [https://gunkies.org/wiki/Extended_UNIBUS] >=20 >=20 > I mean: given that in AB all Unibus signals are present (from specification= s), what is the need for CDEF? The ability to use larger printed circuit boards; it gets you higher density = and avoids the need to run (as many) interconnects off the board and thru the= backplane. Remember that 50-60 years ago was the era of 14,16-pin DIP packag= es for small-scale and medium-scale integration; larger packages existed of c= ourse, but they were the exception. You still needed lots of wires to interco= nnect functionality between chip packages. Using a hex board instead of singl= e or dual boards allowed many of those =E2=80=9Cwires=E2=80=9D to be traces o= n a PCB, rather than run through the backplane or on an over-the-top jumper. = (See the 11/34a.) > Provided that several signals are duplicated in hex pinout, the=20 > backplane will connect homologue signals together, or AB bus will always be= separated from CDEF bus? >=20 > My aim is to design a reprogrammable digital logic board which could=20 > be employed in any system, using 18bits address or also 22bits (i.e. for 11= /24). See the Unibone, to ensure you=E2=80=99re not reinventing the wheel. It also = includes a Unibus description that might be helpful. For something simpler ta= ke a look at the M1710 Unibus Interface Foundation Module. Brochure: https://= vt100.net/manx/details/1,22302 https://retrocmp.com/projects/unibone =E2=80=94Milo --===============8752961803396328817==-- From jeffrey@vcfed.org Sun Mar 30 02:04:05 2025 From: Jeffrey Brace To: cctalk@classiccmp.org Subject: [cctalk] Consignment at VCF East 2025 - April 4-6 - Wall, NJ Date: Sat, 29 Mar 2025 22:03:40 -0400 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8011390505400926609==" --===============8011390505400926609== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Just a few days left to get your consignment entered into NexoPOS for VCF East 2025! https://vcfed.org/events/vintage-computer-festival-east/vcf-east-consignment/ Get your tickets here: https://events.humanitix.com/vintage-computer-festival-east-2025 Info: https://vcfed.org/events/vintage-computer-festival-east/ --===============8011390505400926609==-- From ethan.dicks@gmail.com Sun Mar 30 02:05:52 2025 From: Ethan Dicks To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sat, 29 Mar 2025 22:05:35 -0400 Message-ID: In-Reply-To: <7400a636-4c72-dae4-f5cc-e77f13230c27@pico-systems.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0722180372489979470==" --===============0722180372489979470== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On Sat, Mar 29, 2025 at 9:46 PM Jon Elson via cctalk wrote: > In the "old" days, such as the 1970's, pretty much any > DEC-manufactured peripheral was supplied as a bunch of cards > that plugged into a specific backplane section, generally 9 > slots, I think. A couple double-wide slots were for the > Unibus in and out connectors. There were plenty of 9-slot system unit peripherals, but there were also 4-slot system unit peripherals in the early days. One I have myself is the KE11-A integer math unit. -ethan --===============0722180372489979470==-- From useddec@gmail.com Sun Mar 30 04:02:41 2025 From: Paul Anderson To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sat, 29 Mar 2025 23:02:23 -0500 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6601838487434421329==" --===============6601838487434421329== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Have you looked at the Unibus troubleshooting guide? It used to be on bitsavers. On Sat, Mar 29, 2025 at 9:05 PM Ethan Dicks via cctalk < cctalk(a)classiccmp.org> wrote: > On Sat, Mar 29, 2025 at 9:46 PM Jon Elson via cctalk > wrote: > > In the "old" days, such as the 1970's, pretty much any > > DEC-manufactured peripheral was supplied as a bunch of cards > > that plugged into a specific backplane section, generally 9 > > slots, I think. A couple double-wide slots were for the > > Unibus in and out connectors. > > There were plenty of 9-slot system unit peripherals, but there were > also 4-slot system unit peripherals in the early days. > > One I have myself is the KE11-A integer math unit. > > -ethan > --===============6601838487434421329==-- From cc@dmv.net Sun Mar 30 04:20:14 2025 From: Jim Bender To: cctalk@classiccmp.org Subject: [cctalk] KZCCA scsi/ethernet card - VMS driver needed Date: Sat, 29 Mar 2025 22:22:05 -0500 Message-ID: <4777a034-283d-4de4-86f0-88e2733716ed@dmv.net> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2581675854427999959==" --===============2581675854427999959== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Help needed! Nemonix NXETHER41/NXSCSI41 Intraserver KZCCA DEC/Compaq KZCCA All the same board, sold under multiple brands, the most prominent listed here. Differences are mostly labeling and branding. Looking for what is turning out to be an unicorn... I have a Microvax 3100-90 with the Nemonix NXETHER41 version of the card in it. This is the "ethernet only" version of this option card. It was also available with a SCSI adapter on it. As was the case with many hardware options back in this era, this card, no matter which flavor you have needs a driver installed in VMS in order for it to function. The driver was distributed as a vmsinstal package called "VAX_SCSI" and despite the name it included the drivers for the ethernet side of the board as well as the SCSI. It appears to have had multiple versions, 1.4, 1.5 and 1.6. 1.6 is the latest I have been able to find evidence for. What I have not been able to find evidence of is the files themselves. Despite the Nemonix website still being up, it appears to be a ghost town and none of the phone numbers or email addresses work. The web archive shows some Intraserver pages from the early 2000s with links to download the files but the files themselves were not archived. And unfortunately, DEC/Compaq did not see fit to include this on the CONDIST CDs. So my plea to the community here is... does anyone have the drivers for this card or any leads to where it could be found? Thanks! Jim --===============2581675854427999959==-- From ard.p850ug1@gmail.com Sun Mar 30 10:03:59 2025 From: Tony Duell To: cctalk@classiccmp.org Subject: [cctalk] Wanted : Philips PSU-B3 (or -B4?) power supply for the P3800 Date: Sun, 30 Mar 2025 11:03:41 +0100 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============5689623183897097634==" --===============5689623183897097634== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit I am working on a Philips P3800 computer, about 40 years old. It's a multiprocessor Turbodos machine, a mix of Z80's and 80186's The main problem is that I only have half the power supply. I have the PSU-M3 battery-backed memory supply, but not the logic supply. This I believe to be a PSU-B3 module, although from the circuit diagrams I have, I think a PSU-B4 would work. Outputs are +5V, +12V, -12V, +24V and maybe -5V. There's also remote on/off control, so it's not trivial to use a different power supply The base board is a 233*160mm double eurocard wth a 96 pin 0.1" pitch DIN41612 connector for the outputs and a 32 pin 0.2" pitch DIN41612 connector for the mains input. There is probably another board stacked on top of it (connected only to the baseboard, not to the backplane) and there may be a metal plate on top of the lot. Please let me know if you have any idea where to find one. -tony --===============5689623183897097634==-- From shadoooo@gmail.com Sun Mar 30 10:16:40 2025 From: shadoooo To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sun, 30 Mar 2025 12:16:20 +0200 Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2320079282745117935==" --===============2320079282745117935== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit The why not use a UniBone comment has merit, what will your (FPGA) > implementation add ? > Well, I know the Unibone! Surely is a very capable system for emulation of older hardware and interfaces. Also performances are good as far as I understand (I don't have one). I have the idea of extending the concept of Unibone. The new design shall be modular, composed by: - a main board hosting the SoM and common interfaces (Ethernet, SD, USB, console) - a bus module for specific bus / machine: support could be added for DEC / Data General / other? - an interchangeable interface module for an hardware device (SMD, Pertec, floppy, RX1/2, RL01/02, other). Any kind of interface could be supported, also for example ADC, DAC, maybe video to some limits...) If you have main module and bus module, you have a similar solution to Unibone / Qbone. However if you need to change bus type, you need to swap only the bus adapter (cheaper). If you have main and interfaces modules, you can control physical devices directly, and do anything with it. For example, you can dump / restore the content of a SMD disk at bit level, no need to know the controller format, etc. Similar to Kyroflux for floppy, but MUCH faster! Alternatively, you could also emulate the device at low level (for example a generic SMD disk). If you have a set of main, bus and interface modules, you can do anything as above, plus you can emulate a controller for a specific machine for a specific device. That said, implementing "anything" would be an infinite effort, but the platform is flexible, so support could be added step-by-step. So why an FPGA? A programmable logic can implement a true digital circuit, where the PRUs in the BeagleBone are processors. This means that in an FPGA the time is always precisely determined by a clock, in PRUs it is affected by the software execution. This means that a PRU can work quite well on an asynchronous bus, provided that sample rate is sufficient, even if not constant. But for a fast synchronous interface, i.e. when time is determined by an external clock, often embedded with data, no software approach can work steadily in my opinion. One thing is true: programming an FPGA is designing a netlist, not developing a software. It can be very hard to debug sometimes, because the approach is more similar to repairing an old board with a Logic Analyzer than perform debugging in software: it's a circuit in a chip, there no step-by-step execution! Nevertheless: I'm a quite good electronic engineer, highly experienced with digital logic and FPGA, so the hardware design wouldn't be a problem. Just a matter of time. Nowadays a SoM with a smaller AMD Zynq7010/7020 (a system-on-chip including an FPGA, plus dual core CPU, lot of peripherals) doesn't cost a lot, and have a great usage flexibility. Also brute computing power is superior to older BB. Why not try? I'm open to your comments. As for the UNIBUS unobtainable transceivers: I think the best solution is to use AM26S10 for drivers, and an LVC logic powered at 3.3v for receivers. Both are active parts costing nuts. I would try this approach. Andrea --===============2320079282745117935==-- From elson@pico-systems.com Sun Mar 30 14:57:34 2025 From: Jon Elson To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sun, 30 Mar 2025 09:57:26 -0500 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2438249042461339887==" --===============2438249042461339887== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On 3/29/25 21:05, Ethan Dicks via cctalk wrote: > On Sat, Mar 29, 2025 at 9:46 PM Jon Elson via cctalk > wrote: >> In the "old" days, such as the 1970's, pretty much any >> DEC-manufactured peripheral was supplied as a bunch of cards >> that plugged into a specific backplane section, generally 9 >> slots, I think. A couple double-wide slots were for the >> Unibus in and out connectors. > There were plenty of 9-slot system unit peripherals, but there were > also 4-slot system unit peripherals in the early days. > Yes, you certainly are correct.  It has been SUCH a long time since I worked on any Unibus systems... Jon --===============2438249042461339887==-- From dab@froghouse.org Sun Mar 30 14:59:01 2025 From: David Bridgham To: cctalk@classiccmp.org Subject: [cctalk] DEC bus transceivers (was: DEC Unibus variants) Date: Sun, 30 Mar 2025 10:58:53 -0400 Message-ID: <7ecaa408-2306-4508-8598-2441f5f75502@froghouse.org> In-Reply-To: <82f4c14948c241ea810cee4820be2da5@emeritus-solutions.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6411986056505824884==" --===============6411986056505824884== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On 3/29/25 7:29 PM, Martin Bishop via cctalk wrote: > The why not use a UniBone comment has merit, what will your (FPGA) implemen= tation add ? I'm not shadoooo but I've also been working on a somewhat similar=20 FPGA-based board called the USIC / QSIC.=C2=A0 We started working on it=20 before the UniBone but have been slower to come to completion.=C2=A0 A lot=20 slower.=C2=A0 Maybe there's no point to it anymore but I keep poking along on= =20 the design anyway. > If you solve the (near) unobtanium OC driver / receiver problem - I for one= will be all ears Ah, yeah, this problem.=C2=A0 At one point in the QSIC project I started=20 doodling up circuits to deal with this so we wouldn't have to use up NOS=20 bus transceivers, wouldn't have to deal with the 5V/3.3V conversion for=20 the FPGA, and would be all surface-mount parts to make automated=20 fabrication easier (I never found any DS3662s).=C2=A0 A comparator for the=20 receiver with just the right amount of hysteresis.=C2=A0 Have to look around = a little to find one that's fast enough to meet the 35 ns requirement=20 but they're out there.=C2=A0 And then the driver is just a transistor and a=20 capacitor on the gate/base to limit the slew rate.=C2=A0 Shouldn't be all=20 that hard to design, right?=C2=A0 Might want to go with a constant current=20 source to charge/discharge that capacitor to make it a proper trapezoid=20 waveform though I don't know that that's really needed. This all needs testing and I was going to make up a little test board=20 with both my circuit and a DS8641 that could be plugged into different=20 busses to have a look at the waveforms that come out.=C2=A0 I looked up the=20 pinouts for SPC, MUD, and QBUS so I could design a board that would=20 equally work in all three. I was talked out of this idea though.=C2=A0 We were doing enough new already = with the whole rest of the board and from our prototype QSIC we knew=20 that the DS8641s with level converters would work so it made sense to=20 stick with that. Still, I think about this idea from time to time.=C2=A0 In the small chance=20 that anyone is interested, I just now threw my circuit ideas up on=20 GitHub.=C2=A0 Remember, this is doodling.=C2=A0 I can see three generations o= f=20 ideas in there, as I thought through different possibilities.=C2=A0 I also=20 had this idea about switchable, active termination so that's in there=20 too, though I'm now less sure that's a good idea. https://github.com/dabridgham/DEC-Bus-Transceiver Dave --===============6411986056505824884==-- From fjkraan@electrickery.nl Sun Mar 30 19:07:19 2025 From: Fred Jan Kraan To: cctalk@classiccmp.org Subject: [cctalk] Re: Wanted : Philips PSU-B3 (or -B4?) power supply for the P3800 Date: Sun, 30 Mar 2025 20:57:32 +0200 Message-ID: <66552414-ad68-480f-ab2e-5c4c6102d5ca@electrickery.nl> In-Reply-To: <174335400996.1244.14346478617498114231@classiccmp.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3235675605983622874==" --===============3235675605983622874== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Tony Duell wrote: > I am working on a Philips P3800 computer, about 40 years old. It's a > multiprocessor Turbodos machine, a mix of Z80's and 80186's There is some P3500/3800 documentation online, including power supplies (Netzteile) at: https://electrickery.nl/comp/divcomp/doc/index.html Not exactly what you asked for, but related. Fred Jan --===============3235675605983622874==-- From mjd.bishop@emeritus-solutions.com Sun Mar 30 22:21:17 2025 From: Martin Bishop To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sun, 30 Mar 2025 22:21:09 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7446919027513592612==" --===============7446919027513592612== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Hi shadoooo / Andrea Thank you for the exposition of the merits of FPGA implementations for Unibus= and Qbus machines; it was cheeky of me to pose the question. Regarding cost savings from reusing the main module I suspect the cost of a Z= ynq module would be much less than that of the bus adapter. However, there a= re of course infrastructure and programming savings from commonality. Additi= onally, obtaining sufficient 3v3 IO may be a constraint and there remains the= 3v3/5v interfacing issue. However, fairly cheap Zynq 20 boards with lots of= 3v3 IO are available, see eg https://www.aliexpress.com/item/100500577904560= 8.html - the date codes etc are (of course) obscured on the delivered boards. A PDP-11 will fit on a Zynq 10 SoC, at least my 11/45 -MUL/DIV/ASH(C) -MMU -F= PU does; I use it as an embedded processor, for things below the dignity of t= he SoCs PS. 28 kiWd of main memory can be provided by BRAM (a memory cycle t= ime of 10 ns is practical), and as it is double ported its very easy to peek = over Axi from the PS. Also, you can hook up a Zynq logic analyser for tracin= g execution. For the generality you propose, I should think a microcoded platform would be= appropriate, a 16 bit mill with a suitable sequencer would probably emulate = any 1970's 16 bit mini or peripheral. IIRC numerous PDP-11 implementations u= sed microcode : eg 11/20, 11/40, T-11, etc. However, microcode is of course = software (which you deprecate) but so one could argue are the state machines = which populate the bulk of contemporary FPGA logic. You mention the difficulty of handling externally clocked data streams. I sh= all agree that this is a hardware task. In FPGA / SoC work it is invariably = addressed by synchronising external signals with internal processing clocks; = perhaps at the edge, perhaps at shift reqister read out. But it has to be do= ne or metastability will have its way. A very interesting question is how we= ll "features" like the BBB PRU implement this necessary logic. You are quite correct that the Am26S10 devices are probably the best "off the= shelf" driver option. However, given their transition times, they possibly = require quite a bit of house training for U&Qbus use. Fortunately, not groun= d I need to tread. And, yes it is certainly worth a try. One plea, don't do a DG Nova 2; never= have I been provided with a worse mini ... Best Regards Martin -----Original Message----- From: shadoooo via cctalk [mailto:cctalk(a)classiccmp.org]=20 Sent: 30 March 2025 10:16 To: General Discussion: On-Topic and Off-Topic Posts Cc: shadoooo Subject: [cctalk] Re: DEC Unibus variants The why not use a UniBone comment has merit, what will your (FPGA) > implementation add ? > Well, I know the Unibone! Surely is a very capable system for emulation of older hardware and interface= s. Also performances are good as far as I understand (I don't have one). I have the idea of extending the concept of Unibone. The new design shall be modular, composed by: - a main board hosting the SoM and common interfaces (Ethernet, SD, USB, console) - a bus module for specific bus / machine: support could be added for DEC / D= ata General / other? - an interchangeable interface module for an hardware device (SMD, Pertec, fl= oppy, RX1/2, RL01/02, other). Any kind of interface could be supported, also for example ADC, DAC, maybe vi= deo to some limits...) If you have main module and bus module, you have a similar solution to Unibon= e / Qbone. However if you need to change bus type, you need to swap only the = bus adapter (cheaper). If you have main and interfaces modules, you can control physical devices dir= ectly, and do anything with it. For example, you can dump / restore the conte= nt of a SMD disk at bit level, no need to know the controller format, etc. Similar to Kyroflux for floppy, but MUCH faster! Alternatively, you could also emulate the device at low level (for example a = generic SMD disk). If you have a set of main, bus and interface modules, you can do anything as = above, plus you can emulate a controller for a specific machine for a specifi= c device. That said, implementing "anything" would be an infinite effort, but the platf= orm is flexible, so support could be added step-by-step. So why an FPGA? A programmable logic can implement a true digital circuit, where the PRUs in = the BeagleBone are processors. This means that in an FPGA the time is always = precisely determined by a clock, in PRUs it is affected by the software execu= tion. This means that a PRU can work quite well on an asynchronous bus, provided th= at sample rate is sufficient, even if not constant. But for a fast synchronous interface, i.e. when time is determined by an exte= rnal clock, often embedded with data, no software approach can work steadily = in my opinion. One thing is true: programming an FPGA is designing a netlist, not developing= a software. It can be very hard to debug sometimes, because the approach is more similar = to repairing an old board with a Logic Analyzer than perform debugging in sof= tware: it's a circuit in a chip, there no step-by-step execution! Nevertheless: I'm a quite good electronic engineer, highly experienced with digital logic and FPGA, so the hardware design wouldn= 't be a problem. Just a matter of time. Nowadays a SoM with a smaller AMD Zynq7010/7020 (a system-on-chip including a= n FPGA, plus dual core CPU, lot of peripherals) doesn't cost a lot, and have = a great usage flexibility. Also brute computing power is superior to older BB. Why not try? I'm open to your comments. As for the UNIBUS unobtainable transceivers: I think the best solution is to = use AM26S10 for drivers, and an LVC logic powered at 3.3v for receivers. Both are active parts costing nuts. I would try this approach. Andrea --===============7446919027513592612==-- From mjd.bishop@emeritus-solutions.com Sun Mar 30 22:44:21 2025 From: Martin Bishop To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC bus transceivers (was: DEC Unibus variants) Date: Sun, 30 Mar 2025 22:44:11 +0000 Message-ID: In-Reply-To: <7ecaa408-2306-4508-8598-2441f5f75502@froghouse.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3696146497531626897==" --===============3696146497531626897== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable David You will have seen my response to shadooo / Andreas. Occasional NOS in small quantities excepted, I'm also unaware of slow transit= ion rate drivers available for purchase. The DS8641 DS3662 DS 3682 are to my= knowledge all unobtanium.=20 Your driver design sketches and comments are substantially on the money. Tha= nk you for making them public. However, an effective implementation in discr= ete components would not be "tiny" - even with 0402 passives and a pick / pla= ce machine on the case. Perhaps someday, someone will do a Q/U driver on a m= ulti project wafer - or is that unafordable. Or, to fly another kite - what = about FPAA (Field Programmable Analog Array) components ? Regarding comparators, as receivers, the TLV3501 (for example) is a 5v / 5 ns= part - add hysteresis and set the H/L thresholds using resistors. Certainly= receives OC signals for me. Should you make further progress very interested to hear of it Best Regards Martin -----Original Message----- From: David Bridgham via cctalk [mailto:cctalk(a)classiccmp.org]=20 Sent: 30 March 2025 14:59 To: Martin Bishop via cctalk Cc: David Bridgham Subject: [cctalk] DEC bus transceivers (was: DEC Unibus variants) On 3/29/25 7:29 PM, Martin Bishop via cctalk wrote: > The why not use a UniBone comment has merit, what will your (FPGA) implemen= tation add ? I'm not shadoooo but I've also been working on a somewhat similar FPGA-based = board called the USIC / QSIC.=C2=A0 We started working on it before the UniBo= ne but have been slower to come to completion.=C2=A0 A lot slower.=C2=A0 Mayb= e there's no point to it anymore but I keep poking along on the design anyway. > If you solve the (near) unobtanium OC driver / receiver problem - I=20 > for one will be all ears Ah, yeah, this problem.=C2=A0 At one point in the QSIC project I started dood= ling up circuits to deal with this so we wouldn't have to use up NOS bus tran= sceivers, wouldn't have to deal with the 5V/3.3V conversion for the FPGA, and= would be all surface-mount parts to make automated fabrication easier (I nev= er found any DS3662s).=C2=A0 A comparator for the receiver with just the righ= t amount of hysteresis.=C2=A0 Have to look around a little to find one that's= fast enough to meet the 35 ns requirement but they're out there.=C2=A0 And t= hen the driver is just a transistor and a capacitor on the gate/base to limit= the slew rate.=C2=A0 Shouldn't be all that hard to design, right?=C2=A0 Migh= t want to go with a constant current source to charge/discharge that capacito= r to make it a proper trapezoid waveform though I don't know that that's real= ly needed. This all needs testing and I was going to make up a little test board with bo= th my circuit and a DS8641 that could be plugged into different busses to hav= e a look at the waveforms that come out.=C2=A0 I looked up the pinouts for SP= C, MUD, and QBUS so I could design a board that would equally work in all thr= ee. I was talked out of this idea though.=C2=A0 We were doing enough new already = with the whole rest of the board and from our prototype QSIC we knew that the= DS8641s with level converters would work so it made sense to stick with that. Still, I think about this idea from time to time.=C2=A0 In the small chance t= hat anyone is interested, I just now threw my circuit ideas up on GitHub.=C2= =A0 Remember, this is doodling.=C2=A0 I can see three generations of ideas in= there, as I thought through different possibilities.=C2=A0 I also had this i= dea about switchable, active termination so that's in there too, though I'm n= ow less sure that's a good idea. https://github.com/dabridgham/DEC-Bus-Transceiver Dave --===============3696146497531626897==-- From mjd.bishop@emeritus-solutions.com Sun Mar 30 22:55:34 2025 From: Martin Bishop To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC bus transceivers (was: DEC Unibus variants) Date: Sun, 30 Mar 2025 22:55:28 +0000 Message-ID: <70bebfc895a0458292c6e6a10a878726@emeritus-solutions.com> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8947304577472280702==" --===============8947304577472280702== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable https://forum.vcfed.org/index.php?threads/unibus-qbus-alternative-driver-chip= s.1243045/ Found on my travels - should have been attached to my previous eMail My summary is "no easy answer" Martin -----Original Message----- From: Martin Bishop via cctalk [mailto:cctalk(a)classiccmp.org]=20 Sent: 30 March 2025 22:44 To: General Discussion: On-Topic and Off-Topic Posts Cc: Martin Bishop Subject: [cctalk] Re: DEC bus transceivers (was: DEC Unibus variants) David You will have seen my response to shadooo / Andreas. Occasional NOS in small quantities excepted, I'm also unaware of slow transit= ion rate drivers available for purchase. The DS8641 DS3662 DS 3682 are to my= knowledge all unobtanium.=20 Your driver design sketches and comments are substantially on the money. Tha= nk you for making them public. However, an effective implementation in discr= ete components would not be "tiny" - even with 0402 passives and a pick / pla= ce machine on the case. Perhaps someday, someone will do a Q/U driver on a m= ulti project wafer - or is that unafordable. Or, to fly another kite - what = about FPAA (Field Programmable Analog Array) components ? Regarding comparators, as receivers, the TLV3501 (for example) is a 5v / 5 ns= part - add hysteresis and set the H/L thresholds using resistors. Certainly= receives OC signals for me. Should you make further progress very interested to hear of it Best Regards Martin -----Original Message----- From: David Bridgham via cctalk [mailto:cctalk(a)classiccmp.org] Sent: 30 March 2025 14:59 To: Martin Bishop via cctalk Cc: David Bridgham Subject: [cctalk] DEC bus transceivers (was: DEC Unibus variants) On 3/29/25 7:29 PM, Martin Bishop via cctalk wrote: > The why not use a UniBone comment has merit, what will your (FPGA) implemen= tation add ? I'm not shadoooo but I've also been working on a somewhat similar FPGA-based = board called the USIC / QSIC.=C2=A0 We started working on it before the UniBo= ne but have been slower to come to completion.=C2=A0 A lot slower.=C2=A0 Mayb= e there's no point to it anymore but I keep poking along on the design anyway. > If you solve the (near) unobtanium OC driver / receiver problem - I=20 > for one will be all ears Ah, yeah, this problem.=C2=A0 At one point in the QSIC project I started dood= ling up circuits to deal with this so we wouldn't have to use up NOS bus tran= sceivers, wouldn't have to deal with the 5V/3.3V conversion for the FPGA, and= would be all surface-mount parts to make automated fabrication easier (I nev= er found any DS3662s).=C2=A0 A comparator for the receiver with just the righ= t amount of hysteresis.=C2=A0 Have to look around a little to find one that's= fast enough to meet the 35 ns requirement but they're out there.=C2=A0 And t= hen the driver is just a transistor and a capacitor on the gate/base to limit= the slew rate.=C2=A0 Shouldn't be all that hard to design, right?=C2=A0 Migh= t want to go with a constant current source to charge/discharge that capacito= r to make it a proper trapezoid waveform though I don't know that that's real= ly needed. This all needs testing and I was going to make up a little test board with bo= th my circuit and a DS8641 that could be plugged into different busses to hav= e a look at the waveforms that come out.=C2=A0 I looked up the pinouts for SP= C, MUD, and QBUS so I could design a board that would equally work in all thr= ee. I was talked out of this idea though.=C2=A0 We were doing enough new already = with the whole rest of the board and from our prototype QSIC we knew that the= DS8641s with level converters would work so it made sense to stick with that. Still, I think about this idea from time to time.=C2=A0 In the small chance t= hat anyone is interested, I just now threw my circuit ideas up on GitHub.=C2= =A0 Remember, this is doodling.=C2=A0 I can see three generations of ideas in= there, as I thought through different possibilities.=C2=A0 I also had this i= dea about switchable, active termination so that's in there too, though I'm n= ow less sure that's a good idea. https://github.com/dabridgham/DEC-Bus-Transceiver Dave --===============8947304577472280702==-- From cramcram@gmail.com Sun Mar 30 23:03:05 2025 From: Marc Howard To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC bus transceivers (was: DEC Unibus variants) Date: Sun, 30 Mar 2025 19:02:45 -0400 Message-ID: In-Reply-To: <70bebfc895a0458292c6e6a10a878726@emeritus-solutions.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1411878043651145848==" --===============1411878043651145848== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable I used to design UNIBUS bards in the day. I recall that the 8T26 was a good substitute and there are some pieces of them on ebay. Marc Howard On Sun, Mar 30, 2025 at 6:55=E2=80=AFPM Martin Bishop via cctalk < cctalk(a)classiccmp.org> wrote: > > https://forum.vcfed.org/index.php?threads/unibus-qbus-alternative-driver-ch= ips.1243045/ > > Found on my travels - should have been attached to my previous eMail > > My summary is "no easy answer" > > Martin > > -----Original Message----- > From: Martin Bishop via cctalk [mailto:cctalk(a)classiccmp.org] > Sent: 30 March 2025 22:44 > To: General Discussion: On-Topic and Off-Topic Posts < > cctalk(a)classiccmp.org> > Cc: Martin Bishop > Subject: [cctalk] Re: DEC bus transceivers (was: DEC Unibus variants) > > David > > You will have seen my response to shadooo / Andreas. > > Occasional NOS in small quantities excepted, I'm also unaware of slow > transition rate drivers available for purchase. The DS8641 DS3662 DS 3682 > are to my knowledge all unobtanium. > > Your driver design sketches and comments are substantially on the money. > Thank you for making them public. However, an effective implementation in > discrete components would not be "tiny" - even with 0402 passives and a > pick / place machine on the case. Perhaps someday, someone will do a Q/U > driver on a multi project wafer - or is that unafordable. Or, to fly > another kite - what about FPAA (Field Programmable Analog Array) components > ? > > Regarding comparators, as receivers, the TLV3501 (for example) is a 5v / 5 > ns part - add hysteresis and set the H/L thresholds using resistors. > Certainly receives OC signals for me. > > Should you make further progress very interested to hear of it > > Best Regards > > Martin > > -----Original Message----- > From: David Bridgham via cctalk [mailto:cctalk(a)classiccmp.org] > Sent: 30 March 2025 14:59 > To: Martin Bishop via cctalk > Cc: David Bridgham > Subject: [cctalk] DEC bus transceivers (was: DEC Unibus variants) > > On 3/29/25 7:29 PM, Martin Bishop via cctalk wrote: > > The why not use a UniBone comment has merit, what will your (FPGA) > implementation add ? > > > I'm not shadoooo but I've also been working on a somewhat similar > FPGA-based board called the USIC / QSIC. We started working on it before > the UniBone but have been slower to come to completion. A lot slower. > Maybe there's no point to it anymore but I keep poking along on the design > anyway. > > > > If you solve the (near) unobtanium OC driver / receiver problem - I > > for one will be all ears > > > Ah, yeah, this problem. At one point in the QSIC project I started > doodling up circuits to deal with this so we wouldn't have to use up NOS > bus transceivers, wouldn't have to deal with the 5V/3.3V conversion for the > FPGA, and would be all surface-mount parts to make automated fabrication > easier (I never found any DS3662s). A comparator for the receiver with > just the right amount of hysteresis. Have to look around a little to find > one that's fast enough to meet the 35 ns requirement but they're out > there. And then the driver is just a transistor and a capacitor on the > gate/base to limit the slew rate. Shouldn't be all that hard to design, > right? Might want to go with a constant current source to charge/discharge > that capacitor to make it a proper trapezoid waveform though I don't know > that that's really needed. > > This all needs testing and I was going to make up a little test board with > both my circuit and a DS8641 that could be plugged into different busses to > have a look at the waveforms that come out. I looked up the pinouts for > SPC, MUD, and QBUS so I could design a board that would equally work in all > three. > > I was talked out of this idea though. We were doing enough new already > with the whole rest of the board and from our prototype QSIC we knew that > the DS8641s with level converters would work so it made sense to stick with > that. > > Still, I think about this idea from time to time. In the small chance > that anyone is interested, I just now threw my circuit ideas up on GitHub. > Remember, this is doodling. I can see three generations of ideas in there, > as I thought through different possibilities. I also had this idea about > switchable, active termination so that's in there too, though I'm now less > sure that's a good idea. > > https://github.com/dabridgham/DEC-Bus-Transceiver > > Dave > > --===============1411878043651145848==-- From ethan.dicks@gmail.com Sun Mar 30 23:17:21 2025 From: Ethan Dicks To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sun, 30 Mar 2025 19:17:05 -0400 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============4699089961377430267==" --===============4699089961377430267== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On Sun, Mar 30, 2025 at 11:06 AM Jon Elson wrote: > On 3/29/25 21:05, Ethan Dicks wrote: > > On Sat, Mar 29, 2025 at 9:46 PM Jon Elson wrote: > >> In the "old" days, such as the 1970's, pretty much any > >> DEC-manufactured peripheral was supplied as a bunch of cards > >> that plugged into a specific backplane section, generally 9 > >> slots, I think. A couple double-wide slots were for the > >> Unibus in and out connectors. > > There were plenty of 9-slot system unit peripherals, but there were > > also 4-slot system unit peripherals in the early days. I also remembered a couple other 4-slot system unit peripherals I have: RK11-D VT11 Probably the most common 9-slot system unit devices I've encountered are: RK611 (which happens to have a couple of available SPC slots) DH11 RH11 But there are many of both sizes. Cheers, -ethan --===============4699089961377430267==-- From cz@alembic.crystel.com Sun Mar 30 23:47:57 2025 From: Christopher Zach To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sun, 30 Mar 2025 18:47:49 -0500 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============6013625298505110803==" --===============6013625298505110803== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Da11-f unibus window is 4 slots and has two complete unibuses (I have one) On March 30, 2025 6:17:05 PM CDT, Ethan Dicks via cctalk wrote: >On Sun, Mar 30, 2025 at 11:06=E2=80=AFAM Jon Elson wrote: >> On 3/29/25 21:05, Ethan Dicks wrote: >> > On Sat, Mar 29, 2025 at 9:46=E2=80=AFPM Jon Elson wrote: >> >> In the "old" days, such as the 1970's, pretty much any >> >> DEC-manufactured peripheral was supplied as a bunch of cards >> >> that plugged into a specific backplane section, generally 9 >> >> slots, I think. A couple double-wide slots were for the >> >> Unibus in and out connectors. >> > There were plenty of 9-slot system unit peripherals, but there were >> > also 4-slot system unit peripherals in the early days. > >I also remembered a couple other 4-slot system unit peripherals I have: > > RK11-D > VT11 > >Probably the most common 9-slot system unit devices I've encountered are: > > RK611 (which happens to have a couple of available SPC slots) > DH11 > RH11 > >But there are many of both sizes. > >Cheers, > >-ethan --===============6013625298505110803==-- From useddec@gmail.com Mon Mar 31 04:50:02 2025 From: Paul Anderson To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC bus transceivers (was: DEC Unibus variants) Date: Sun, 30 Mar 2025 23:49:44 -0500 Message-ID: In-Reply-To: <7ecaa408-2306-4508-8598-2441f5f75502@froghouse.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2963966010107492767==" --===============2963966010107492767== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Does anyone have a list of what boards they were used on? I do have some boards I'm planning or recycling (I know, I shouldn't say that, especially here, but most are common boards nobody uses anymore.) I haven't looked at the IPBs yet, but did plan on pulling some of the chips. On Sun, Mar 30, 2025 at 9:59 AM David Bridgham via cctalk < cctalk(a)classiccmp.org> wrote: > On 3/29/25 7:29 PM, Martin Bishop via cctalk wrote: > > The why not use a UniBone comment has merit, what will your (FPGA) > implementation add ? > > > I'm not shadoooo but I've also been working on a somewhat similar > FPGA-based board called the USIC / QSIC. We started working on it > before the UniBone but have been slower to come to completion. A lot > slower. Maybe there's no point to it anymore but I keep poking along on > the design anyway. > > > > If you solve the (near) unobtanium OC driver / receiver problem - I for > one will be all ears > > > Ah, yeah, this problem. At one point in the QSIC project I started > doodling up circuits to deal with this so we wouldn't have to use up NOS > bus transceivers, wouldn't have to deal with the 5V/3.3V conversion for > the FPGA, and would be all surface-mount parts to make automated > fabrication easier (I never found any DS3662s). A comparator for the > receiver with just the right amount of hysteresis. Have to look around > a little to find one that's fast enough to meet the 35 ns requirement > but they're out there. And then the driver is just a transistor and a > capacitor on the gate/base to limit the slew rate. Shouldn't be all > that hard to design, right? Might want to go with a constant current > source to charge/discharge that capacitor to make it a proper trapezoid > waveform though I don't know that that's really needed. > > This all needs testing and I was going to make up a little test board > with both my circuit and a DS8641 that could be plugged into different > busses to have a look at the waveforms that come out. I looked up the > pinouts for SPC, MUD, and QBUS so I could design a board that would > equally work in all three. > > I was talked out of this idea though. We were doing enough new already > with the whole rest of the board and from our prototype QSIC we knew > that the DS8641s with level converters would work so it made sense to > stick with that. > > Still, I think about this idea from time to time. In the small chance > that anyone is interested, I just now threw my circuit ideas up on > GitHub. Remember, this is doodling. I can see three generations of > ideas in there, as I thought through different possibilities. I also > had this idea about switchable, active termination so that's in there > too, though I'm now less sure that's a good idea. > > https://github.com/dabridgham/DEC-Bus-Transceiver > > Dave > > --===============2963966010107492767==-- From cc@informatik.uni-stuttgart.de Mon Mar 31 08:31:59 2025 From: Christian Corti To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Mon, 31 Mar 2025 10:31:49 +0200 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3465163687604086814==" --===============3465163687604086814== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit On Sat, 29 Mar 2025, shadoooo wrote: > My aim is to design a reprogrammable digital logic board which could be > employed in any system, > using 18bits address or also 22bits (i.e. for 11/24). You're trying to recreate the Unibone? Christian --===============3465163687604086814==-- From donald@donaldwhittemore.com Mon Mar 31 09:14:38 2025 From: "donald donaldwhittemore.com" To: cctalk@classiccmp.org Subject: [cctalk] Re: Selling Off My Q-Bus Collection Date: Wed, 19 Mar 2025 16:02:35 +0000 Message-ID: <49F318F6-E037-4945-912E-D0D8D2B67420@donaldwhittemore.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7968356345810416700==" --===============7968356345810416700== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable You may want to contact Dave. I believe he is doing things with this stuff. E= x-Microsoft software engineer. On X he is Dave W Plummer =E2=81=A6=E2=80=AA@davepl1968=E2=80=AC=E2=81=A9 --===============7968356345810416700==-- From wayne.sudol@hotmail.com Mon Mar 31 09:15:36 2025 From: Wayne S To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Sat, 29 Mar 2025 19:35:43 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1688572474778876121==" --===============1688572474778876121== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable You might want to ask your questions on the Digital Equipment discord. Tony Bilquest could probably answer them. Including an invite=E2=80=A6 Join the The Digital Equipment Corporation Fan Spot Discord Server! discord.gg [favicon.ico] Sent from my iPhone On Mar 29, 2025, at 10:34, shadoooo via cctalk wrot= e: =EF=BB=BFHello, I'm searching information about all existing variants of DEC Unibus in Dual/Q= uad/Hex flavors. I read the "UnibusSpec1979.pdf" on bitsavers, which reports a "Standard Unibu= s" pinout in the last pages. However in several backplanes "Small Peripheral Controller", "Modified Unibus= Device" and "Extended Unibus" are supported. Maybe also other unlisted Unibus variants do exist (e.g VAX 11/730)? I also found the gunkies.org WIKI very helpful, however it is still quite dif= ficult to compare the pinout differences (dummy proof). Where could I find a specific DEC documentation about the more recent variant= s, similar to the 1979 specs, but referred to SPC, MUD, EUB, ect? Big doubts: - why DEC, having defined the dual Standard pinout, had then to implement the= quad SPC backplanes? - why DEC, having defined quad backplanes, had then to implement the hex (sta= ndard + SPC) or (MUD + SPC) or EUB? I mean: given that in AB all Unibus signals are present (from specifications)= , what is the need for CDEF? Provided that several signals are duplicated in hex pinout, the backplane wil= l connect homologue signals together, or AB bus will always be separated from CDEF bus? My aim is to design a reprogrammable digital logic board which could be emplo= yed in any system, using 18bits address or also 22bits (i.e. for 11/24). Thanks Andrea --===============1688572474778876121==-- From cz@alembic.crystel.com Mon Mar 31 10:07:00 2025 From: Christopher Zach To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC bus transceivers (was: DEC Unibus variants) Date: Mon, 31 Mar 2025 05:06:52 -0500 Message-ID: <7CEAAFE0-7572-46CD-9903-7D11AC3D6851@alembic.crystel.com> In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0667487353880099586==" --===============0667487353880099586== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Indeed. I think I have sixteen dZ11 boards that I could part for a unibone On March 30, 2025 11:49:44 PM CDT, Paul Anderson via cctalk wrote: >Does anyone have a list of what boards they were used on? > >I do have some boards I'm planning or recycling (I know, I shouldn't say >that, especially here, but most are common boards nobody uses anymore.) I >haven't looked at the IPBs yet, but did plan on pulling some of the chips. > >On Sun, Mar 30, 2025 at 9:59=E2=80=AFAM David Bridgham via cctalk < >cctalk(a)classiccmp.org> wrote: > >> On 3/29/25 7:29 PM, Martin Bishop via cctalk wrote: >> > The why not use a UniBone comment has merit, what will your (FPGA) >> implementation add ? >> >> >> I'm not shadoooo but I've also been working on a somewhat similar >> FPGA-based board called the USIC / QSIC. We started working on it >> before the UniBone but have been slower to come to completion. A lot >> slower. Maybe there's no point to it anymore but I keep poking along on >> the design anyway. >> >> >> > If you solve the (near) unobtanium OC driver / receiver problem - I for >> one will be all ears >> >> >> Ah, yeah, this problem. At one point in the QSIC project I started >> doodling up circuits to deal with this so we wouldn't have to use up NOS >> bus transceivers, wouldn't have to deal with the 5V/3.3V conversion for >> the FPGA, and would be all surface-mount parts to make automated >> fabrication easier (I never found any DS3662s). A comparator for the >> receiver with just the right amount of hysteresis. Have to look around >> a little to find one that's fast enough to meet the 35 ns requirement >> but they're out there. And then the driver is just a transistor and a >> capacitor on the gate/base to limit the slew rate. Shouldn't be all >> that hard to design, right? Might want to go with a constant current >> source to charge/discharge that capacitor to make it a proper trapezoid >> waveform though I don't know that that's really needed. >> >> This all needs testing and I was going to make up a little test board >> with both my circuit and a DS8641 that could be plugged into different >> busses to have a look at the waveforms that come out. I looked up the >> pinouts for SPC, MUD, and QBUS so I could design a board that would >> equally work in all three. >> >> I was talked out of this idea though. We were doing enough new already >> with the whole rest of the board and from our prototype QSIC we knew >> that the DS8641s with level converters would work so it made sense to >> stick with that. >> >> Still, I think about this idea from time to time. In the small chance >> that anyone is interested, I just now threw my circuit ideas up on >> GitHub. Remember, this is doodling. I can see three generations of >> ideas in there, as I thought through different possibilities. I also >> had this idea about switchable, active termination so that's in there >> too, though I'm now less sure that's a good idea. >> >> https://github.com/dabridgham/DEC-Bus-Transceiver >> >> Dave >> >> --===============0667487353880099586==-- From dab@froghouse.org Mon Mar 31 13:01:40 2025 From: David Bridgham To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC bus transceivers Date: Mon, 31 Mar 2025 09:01:33 -0400 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8062321203408073259==" --===============8062321203408073259== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On 3/30/25 6:44 PM, Martin Bishop wrote: > Your driver design sketches and comments are substantially on the money. T= hank you for making them public. However, an effective implementation in dis= crete components would not be "tiny" - even with 0402 passives and a pick / p= lace machine on the case. No, not tiny.=C2=A0 With the BGA parts of the FPGA and DDR3 SDRAM, I'd=20 already made the choice that this board would have to be commercially=20 assembled so smaller parts were acceptable.=C2=A0 Even so, at one point I=20 mocked it up just to see if it would fit with SOT-23 and 0603 parts and=20 it did, just barely, across a double-height QBUS board.=C2=A0 That was one of= =20 my simpler designs for this, though.=C2=A0 So dunno.=C2=A0 If you can lay out= the=20 circuit to drive two bus lines in a chain of components that's only one=20 SOT-23 wide, then I think it fits.=C2=A0 It might stretch up the board a=20 ways, but I have room in that direction. > Perhaps someday, someone will do a Q/U driver on a multi project wafer - or= is that unafordable. Or, to fly another kite - what about FPAA (Field Progr= ammable Analog Array) components ? I hadn't thought about those multi-project wafers.=C2=A0 Don't know if that'd= =20 make sense.=C2=A0 I keep hoping that one day soon we'll start to see=20 hobbyist-level 3d printing of ICs.=C2=A0 Maybe only 1=C2=B5m feature size or = even=20 larger but think what people would do with that.=C2=A0 Not out there yet thou= gh. > Regarding comparators, as receivers, the TLV3501 (for example) is a 5v / 5 = ns part - add hysteresis and set the H/L thresholds using resistors. Certain= ly receives OC signals for me. Yup, that's the sort of part I was thinking of.=C2=A0 I'd used the MAX9107=20 but the TI part is even faster.=C2=A0 One thing I could never find was a=20 comparator that was both fast and had a OC/OD output. Or one that ran on=20 3.3V so it could drive the FPGA directly but was rated for higher=20 voltages than Vcc on the inputs. > Should you make further progress very interested to hear of it I'm not sure where I'm going to go with these ideas but if I do=20 anything, I'll be sure to let people know. Dave --===============8062321203408073259==-- From mjd.bishop@emeritus-solutions.com Mon Mar 31 14:42:45 2025 From: Martin Bishop To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC bus transceivers Date: Mon, 31 Mar 2025 14:42:40 +0000 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8775211005638225783==" --===============8775211005638225783== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable David The SOT-23 wide per output signal is a useful metric, thankyou. I presume th= at is with outputs drivers on both sides. Your comparator ask is probably unobtanium: - OC output =3D> slow (75+ ns, just like the Unibus settling time - although = perhaps largely due to an initially overdriven ) - 3v3 operation =3D> beyond the rails operation with 5v logic; Google says Ma= xim do some parts, rails +/- 0.3 v -- just like TI, who are more honest by om= iting the BTR sticker Should you find such a beast, I'd like to know. Best Wishes Martin -----Original Message----- From: David Bridgham via cctalk [mailto:cctalk(a)classiccmp.org]=20 Sent: 31 March 2025 13:02 To: General Discussion: On-Topic and Off-Topic Posts Cc: David Bridgham Subject: [cctalk] Re: DEC bus transceivers On 3/30/25 6:44 PM, Martin Bishop wrote: > Your driver design sketches and comments are substantially on the money. T= hank you for making them public. However, an effective implementation in dis= crete components would not be "tiny" - even with 0402 passives and a pick / p= lace machine on the case. No, not tiny.=C2=A0 With the BGA parts of the FPGA and DDR3 SDRAM, I'd alread= y made the choice that this board would have to be commercially assembled so = smaller parts were acceptable.=C2=A0 Even so, at one point I mocked it up jus= t to see if it would fit with SOT-23 and 0603 parts and it did, just barely, = across a double-height QBUS board.=C2=A0 That was one of my simpler designs f= or this, though.=C2=A0 So dunno.=C2=A0 If you can lay out the circuit to driv= e two bus lines in a chain of components that's only one SOT-23 wide, then I think it fits.=C2=A0 It might stretch up the board a ways= , but I have room in that direction. > Perhaps someday, someone will do a Q/U driver on a multi project wafer - or= is that unafordable. Or, to fly another kite - what about FPAA (Field Progr= ammable Analog Array) components ? I hadn't thought about those multi-project wafers.=C2=A0 Don't know if that'd= make sense.=C2=A0 I keep hoping that one day soon we'll start to see hobbyis= t-level 3d printing of ICs.=C2=A0 Maybe only 1=C2=B5m feature size or even la= rger but think what people would do with that.=C2=A0 Not out there yet though. > Regarding comparators, as receivers, the TLV3501 (for example) is a 5v / 5 = ns part - add hysteresis and set the H/L thresholds using resistors. Certain= ly receives OC signals for me. Yup, that's the sort of part I was thinking of.=C2=A0 I'd used the MAX9107 bu= t the TI part is even faster.=C2=A0 One thing I could never find was a compar= ator that was both fast and had a OC/OD output. Or one that ran on 3.3V so it= could drive the FPGA directly but was rated for higher voltages than Vcc on = the inputs. > Should you make further progress very interested to hear of it I'm not sure where I'm going to go with these ideas but if I do anything, I'l= l be sure to let people know. Dave --===============8775211005638225783==-- From ethan.dicks@gmail.com Mon Mar 31 15:53:31 2025 From: Ethan Dicks To: cctalk@classiccmp.org Subject: [cctalk] Re: DEC Unibus variants Date: Mon, 31 Mar 2025 11:53:14 -0400 Message-ID: In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2010077668355521072==" --===============2010077668355521072== Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On Sat, Mar 29, 2025 at 1:41 PM shadoooo via cctalk wrote: > I read the "UnibusSpec1979.pdf" on bitsavers, which reports a "Standard > Unibus" pinout in the last pages. > However in several backplanes "Small Peripheral Controller", "Modified > Unibus Device" and "Extended Unibus" are supported. > Maybe also other unlisted Unibus variants do exist (e.g VAX 11/730)? Yes. The 11/730 is a little different because below the CPU boards, the first 5 slots can take 1MB memory cards or peripheral cards (each of those slots has a single memory select line that goes back to the memory controller, so a) the cards must be 1MB each, and b) there are only 5 select lines coming out of the PAL. Our original COMBOARD wasn't 100% conformant to the Unibus spec - it works in DD11 backplanes just fine but does _not_ work in an 11/730 without dozens of cuts and bodge wires. > Big doubts: > - why DEC, having defined the dual Standard pinout, had then to > implement the quad SPC backplanes? > - why DEC, having defined quad backplanes, had then to implement the hex > (standard + SPC) or (MUD + SPC) or EUB? > I mean: given that in AB all Unibus signals are present (from > specifications), what is the need for CDEF? > Provided that several signals are duplicated in hex pinout, the > backplane will connect homologue signals together, > or AB bus will always be separated from CDEF bus? The "why" for a good portion of that was how the Unibus evolved from 1970. In the 11/20, A/B slots were the true Unibus signals, meant for BC11 cables and M930 terminators. Many (most?) original peripherals were implemented not as single cards, but as system units (a block of 4 or 9 slots with Unibus in and out on first and last A/B but with unspecified wiring in between) including the console serial port before the SPC M7800 DL11. For system unit peripherals, there was frequently a common scheme with an M105 and other cards to implement the Unibus parts of the peripheral that resulted in a typical wiring arrangement of certain signals on CDEF that were just wired over to Unibus signals from A/B. With all the needed signals on CDEF and with Unibus in/out and power connectors in some B and even sometimes a KM11 diagnostic board, that left room for quad SPCs in any open slot. Starting with the 11/05, which had to fit in a single backplane, the amount of integration rose to where hex peripherals (and memory) were possible. As mentioned, EUB slots exist to support 22-bit memory addressing for Unibus memory (11/24). short answer - the Unibus evolved as integration density increased. -ethan --===============2010077668355521072==--